Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics
R Manohar, CW Kelly - US Patent 7,880,499, 2011 - Google Patents
US7880499B2 - Reconfigurable logic fabrics for integrated circuits and systems and methods
for configuring reconfigurable logic fabrics - Google Patents US7880499B2 - Reconfigurable …
for configuring reconfigurable logic fabrics - Google Patents US7880499B2 - Reconfigurable …
Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics
R Manohar, CW Kelly - US Patent 8,575,959, 2013 - Google Patents
US8575959B2 - Reconfigurable logic fabrics for integrated circuits and systems and
methods for configuring reconfigurable logic fabrics - Google Patents US8575959B2 …
methods for configuring reconfigurable logic fabrics - Google Patents US8575959B2 …
Asynchronous conversion circuitry apparatus, systems, and methods
R Manohar, CW Kelly, V Ekanayake… - US Patent …, 2011 - Google Patents
BACKGROUND In many cases, asynchronous circuit designs offer advan tages over
synchronous designs. Such as performance and power benefits. However, to implement a …
synchronous designs. Such as performance and power benefits. However, to implement a …
Intelligent cellular electronic structures
MJ Pavicic, C You - US Patent 7,956,639, 2011 - Google Patents
US7956639B2 - Intelligent cellular electronic structures - Google Patents US7956639B2 -
Intelligent cellular electronic structures - Google Patents Intelligent cellular electronic …
Intelligent cellular electronic structures - Google Patents Intelligent cellular electronic …
Programmable crossbar structures in asynchronous systems
V Ekanayake, CW Kelly, R Manohar - US Patent 8,300,635, 2012 - Google Patents
Methods, systems, and circuits for forming and operating a crossbar structure in an
asynchronous system are described. One or more input ports of a programmable crossbar …
asynchronous system are described. One or more input ports of a programmable crossbar …
Asynchronous conversion circuitry apparatus, systems, and methods
R Manohar, CW Kelly, V Ekanayake… - US Patent …, 2011 - Google Patents
Apparatus, systems, and methods operate to receive a sufficient number of asynchronous
input tokens at the inputs of an asynchronous apparatus to conduct a specified processing …
input tokens at the inputs of an asynchronous apparatus to conduct a specified processing …
Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics
R Manohar, CW Kelly - US Patent 8,125,242, 2012 - Google Patents
US8125242B2 - Reconfigurable logic fabrics for integrated circuits and systems and
methods for configuring reconfigurable logic fabrics - Google Patents US8125242B2 …
methods for configuring reconfigurable logic fabrics - Google Patents US8125242B2 …
Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics
R Manohar, CW Kelly - US Patent 8,949,759, 2015 - Google Patents
In accordance with the present invention there are provided herein asynchronous
reconfigurable logic fabrics for inte grated circuits and methods for designing asynchronous …
reconfigurable logic fabrics for inte grated circuits and methods for designing asynchronous …
Method and apparatus for curing a composite article
AW Hamilton, C Tachtatzis - US Patent 11,453,148, 2022 - Google Patents
Disclosed is a method of curing a composite article and associated curing apparatus. A heat
source is provided for heating the composite article. A temperature related property is …
source is provided for heating the composite article. A temperature related property is …
Asynchronous clock-less digital logic path planning apparatus and method
TE Chornenky - US Patent 10,719,079, 2020 - Google Patents
A hybrid of initial time consuming phase of a Single Directional Dijkstra's Algorithm is
embodied on an unclocked CMOS logic chip using a parallelized approach with …
embodied on an unclocked CMOS logic chip using a parallelized approach with …