Modern electronics testing has a legacy of more than 40 years. The introduction of new
technologies, especially nanometer technologies with 90nm or smaller geometry, has …

Billion transistor systems-on-chip increasingly require dynamic management of their
hardware components and careful coordination of the tasks that they carry out. Diverse real …

Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …

A nonlinear normalization method, the “line density equalization”, is proposed, where a
resampling is done so as to equate the product of a local line density and a (variable) …

This book presents an overview of the issues related to the test, diagnosis and fault-
tolerance of Network on Chip-based systems. It is the first book dedicated to the quality …

In this work, we propose a distributed functional test mechanism for NoCs which scales to
large-scale networks with general topologies and routing algorithms. Each router and its …

A novel strategy to detect interconnect faults between distinct channels in networks-on-chip
is proposed. Short faults between distinct channels in the data, control and communication …

A 3D stacked network-on-chip (NOC) promises the integration of a large number of cores in
a many-core system-on-chip (SOC). The NOC can be used to test the embedded cores in …

Reuse of network-on-chip (NoC) for test data and test response delivery is attractive.
However, previous techniques do not effectively use the bandwidths of the network by …

On-chip integrated network, the so-called network-on-chip (NoC), is becoming a promising
communication paradigm for the next-generation embedded core-based system chips. The …