Approximate arithmetic circuits: A survey, characterization, and recent applications

H Jiang, FJH Santiago, H Mo, L Liu… - Proceedings of the …, 2020 - ieeexplore.ieee.org
Approximate computing has emerged as a new paradigm for high-performance and energy-
efficient design of circuits and systems. For the many approximate arithmetic circuits …

Approximate computing survey, Part I: terminology and software & hardware approximation techniques

V Leon, MA Hanif, G Armeniakos, X Jiao… - arXiv preprint arXiv …, 2023 - arxiv.org
The rapid growth of demanding applications in domains applying multimedia processing
and machine learning has marked a new era for edge and cloud computing. These …

Weight-oriented approximation for energy-efficient neural network inference accelerators

ZG Tasoulas, G Zervakis… - … on Circuits and …, 2020 - ieeexplore.ieee.org
Current research in the area of Neural Networks (NN) has resulted in performance
advancements for a variety of complex problems. Especially, embedded system applications …

Design and analysis of approximate 4–2 compressors for high-accuracy multipliers

T Kong, S Li - IEEE Transactions on Very Large Scale …, 2021 - ieeexplore.ieee.org
Approximate multipliers are applicable in error-resilient applications with relaxed precision
constraints, including image processing, multimedia, and data recognition. Such multipliers …

A novel approximate adder design using error reduced carry prediction and constant truncation

J Lee, H Seo, H Seok, Y Kim - IEEE Access, 2021 - ieeexplore.ieee.org
This paper proposes a novel approximate adder that exploits an error-reduced carry
prediction and constant truncation with error reduction schemes. The proposed adder …

Low error efficient approximate adders for FPGAs

W Ahmad, B Ayrancioglu, I Hamzaoglu - IEEE Access, 2021 - ieeexplore.ieee.org
In this paper, we propose a methodology for designing low error efficient approximate
adders for FPGAs. The proposed methodology utilizes FPGA resources efficiently to reduce …

Circuit-level techniques for logic and memory blocks in approximate computing systemsx

S Amanollahi, M Kamal, A Afzali-Kusha… - Proceedings of the …, 2020 - ieeexplore.ieee.org
This article presents an overview of circuit-level techniques used for approximate computing
(AC), including both computation and data storage units. After providing some background …

High-efficient, ultra-low-power and high-speed 4: 2 compressor with a new full adder cell for bioelectronics applications

A Sadeghi, N Shiri, M Rafiee - Circuits, Systems, and Signal Processing, 2020 - Springer
Size reduction in complementary metal–oxide–semiconductor integrated circuits (ICs) is a
challenge. Carbon nanotube field effect transistor (CNTFET) technology with advantages …

An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications

M Rafiee, F Pesaran, A Sadeghi, N Shiri - Microelectronics Journal, 2021 - Elsevier
Different digital multipliers have resulted from various algorithms and hardware designs.
This article presents a high-performance multiplier by a novel AND gate and a modified …

Design and Implementation of Low Power and Area Efficient Architecture for High Performance ALU

U Penchalaiah, VGS Kumar - Parallel Processing Letters, 2022 - World Scientific
Digital Signal Processors (DSP) have a ubiquitous presence in almost all civil and military
signal processing applications, including mission critical environments like nuclear reactors …