Fpga-based face detection system using haar classifiers

J Cho, S Mirzaei, J Oberg, R Kastner - Proceedings of the ACM/SIGDA …, 2009 - dl.acm.org
This paper presents a hardware architecture for face detection based system on AdaBoost
algorithm using Haar features. We describe the hardware design techniques including …

Parallelized architecture of multiple classifiers for face detection

J Cho, B Benson, S Mirzaei… - 2009 20th IEEE …, 2009 - ieeexplore.ieee.org
This paper presents a parallelized architecture of multiple classifiers for face detection
based on the Viola and Jones object detection method. This method makes use of the …

Face detection on embedded systems

A Bigdeli, C Sim, M Biglari-Abhari, BC Lovell - International Conference on …, 2007 - Springer
Over recent years automated face detection and recognition (FDR) have gained significant
attention from the commercial and research sectors. This paper presents an embedded face …

A hardware architecture for real-time object detection using depth and edge information

C Kyrkou, C Ttofis, T Theocharides - ACM Transactions on Embedded …, 2013 - dl.acm.org
Emerging embedded 3D vision systems for robotics and security applications utilize object
detection to perform video analysis in order to intelligently interact with their host …

Design and implementation of real time car theft detection in FPGA

A Ahilan, EAK James - 2011 Third International Conference on …, 2011 - ieeexplore.ieee.org
Face detection is a technique that determines the locations and sizes of human face images.
It detects facial features and ignores anything else, such as buildings, trees and bodies …

[PDF][PDF] Performance analysis of bit-width reduced floating-point arithmetic units in FPGAs: a case study of neural network-based face detector

Y Lee, Y Choi, SB Ko, M Ho Lee - EURASIP Journal on Embedded …, 2009 - Springer
This paper implements a field programmable gate array-(FPGA-) based face detector using
a neural network (NN) and the bit-width reduced floating-point arithmetic unit (FPU). The …

Low cost FPGA-based highly accurate face recognition system using combined wavelets with subspace methods

N Shams, I Hosseini, MS Sadri… - … Conference on Image …, 2006 - ieeexplore.ieee.org
Low cost implementation of an accurate face recognition system is useful in many
applications. A face recognition algorithm based on Daubechies wavelets is proposed. The …

FPGA-accelerated object detection using edge information

C Kyrkou, C Ttofis… - 2011 21st International …, 2011 - ieeexplore.ieee.org
Object detection is a vital task in several existing as well as emerging applications, requiring
real-time processing and low energy consumption, and often with limited available hardware …

A hardware acceleration unit for face detection

SM Rigos, V Mariatos, N Voros - … Mediterranean Conference on …, 2012 - ieeexplore.ieee.org
In recent years the use of real-time face detection and face recognition for surveillance,
human-machine interfaces and other applications has increased and thus the need for high …

Accelerating object detection via a visual-feature-directed search cascade: algorithm and field programmable gate array implementation

C Kyrkou, T Theocharides - Journal of Electronic Imaging, 2016 - spiedigitallibrary.org
Object detection is a major step in several computer vision applications and a requirement
for most smart camera systems. Recent advances in hardware acceleration for real-time …