FT-PDC: an enhanced hybrid congestion-aware fault-tolerant routing technique based on path diversity for 3D NoC
E Khodadadi, B Barekatain, E Yaghoubi… - The Journal of …, 2022 - Springer
In recent years, using three-dimensional Network-on-Chip (3D-NoC) has increased due to
its high performance and integration of processing elements. However, as technology …
its high performance and integration of processing elements. However, as technology …
[图书][B] Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges
In recent years, there has been a considerable amount of effort, both in industry and
academia, focusing on the design, implementation, performance analysis, evaluation and …
academia, focusing on the design, implementation, performance analysis, evaluation and …
Soft-error resilient network-on-chip for safety-critical applications
Three-Dimensional Networks-on-Chips (3D-NoCs) have been proposed as an auspicious
solution, merging the high parallelism of the packet switched NoC paradigm with the high …
solution, merging the high parallelism of the packet switched NoC paradigm with the high …
Fault-tolerant photonic network-on-chip
M Meyer, AB Abdallah - Photonic Interconnects for Computing …, 2022 - api.taylorfrancis.com
Abstract Photonic Networks-on-Chip (PNoCs) promise significant advantages over their
electronic counterparts. In particular, they offer a potentially disruptive technology solution …
electronic counterparts. In particular, they offer a potentially disruptive technology solution …
Communication Networks for Neuromorphic Systems
A Ben Abdallah, K N. Dang - Neuromorphic Computing Principles and …, 2022 - Springer
The brain connectivity is generally described at several levels of scale, including synaptic
connections that link individual at the microscale, networks connecting neuronal populations …
connections that link individual at the microscale, networks connecting neuronal populations …
Report on power, thermal and reliability prediction for 3D Networks-on-Chip
By combining Three Dimensional Integrated Circuits with the Network-on-Chip infrastructure
to obtain 3D Networks-on-Chip (3D-NoCs), the new on-chip communication paradigm …
to obtain 3D Networks-on-Chip (3D-NoCs), the new on-chip communication paradigm …
SoC Buses and Peripherals: Features and Architectures
KS Mohamed, KS Mohamed - IP Cores Design from Specifications to …, 2016 - Springer
Components connected on a Printed Circuit Board (PCB) or System-on-Board (SoB) can
now be integrated onto single chip, hence the development of System-on-Chip (SoC) design …
now be integrated onto single chip, hence the development of System-on-Chip (SoC) design …
FTHR: Fault Tolerant Hypercube-based Routing for NoCs
R Kourdy, A Rajabzadeh - 2019 9th International Conference …, 2019 - ieeexplore.ieee.org
Network-on-chips are a novel communications infrastructure for decoupling the
communication elements from processing cores, with the goal of eliminating the challenges …
communication elements from processing cores, with the goal of eliminating the challenges …
Multicore SoC On-Chip Interconnection Networks
A Ben Abdallah, A Ben Abdallah - … Systems-On-Chip: Architecture, On-Chip …, 2017 - Springer
Global interconnects are becoming the principal performance bottleneck for high-
performance multicore SoCs. Since one of the main purposes of SoC design is to shrink the …
performance multicore SoCs. Since one of the main purposes of SoC design is to shrink the …
Advanced Multicore SoC Interconnects
A Ben Abdallah, A Ben Abdallah - … Systems-On-Chip: Architecture, On-Chip …, 2017 - Springer
Next-generation multicore SoC architectures are expected to combine hundreds of tiny
cores integrated together to satisfy the power and performance requirements of large …
cores integrated together to satisfy the power and performance requirements of large …