High speed DMT for 224 gb/s and faster wireline transmission

Z Jiang, H Beshara, J Lam… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
This paper presents a high data rate wireline Discrete Multitone (DMT) transceiver capable
of operating at 252 Gbps and higher for short range chip-to-chip and chip-to-module …

Hybrid NRZ/multi-tone serial data transceiver for multi-drop memory interfaces

K Gharibdoust, A Tajalli… - IEEE Journal of Solid …, 2015 - ieeexplore.ieee.org
A 7.5 Gb/s mixed NRZ/multi-tone (NRZ/MT) transceiver for multi-drop bus (MDB) memory
interfaces is designed and fabricated in 40 nm CMOS technology. Reducing the complexity …

High data rate DMT SERDES design

Z Jiang - 2022 - repository.library.carleton.ca
The research presented in this thesis involves implementing a high data rate wireline com-
munications system using Discrete Multitone (DMT) transmission. A theoretical analysis of …

Impulse response analysis of carrier-modulated multiband RF-interconnect (MRFI)

Y Kim, WH Cho, Y Du, J Cong, T Itoh… - … Integrated Circuits and …, 2017 - Springer
Impulse response of energy-efficient multiband RF-interconnect (MRFI) is analyzed to
quantify its information capacity for transmitting digital data via various types of physical …

Nonlinearity, noise and bandwidth influence for PAM4 modulation format

N Neumann, Z Al-Husseini… - Photonic Networks; 19th …, 2018 - ieeexplore.ieee.org
PAM4 is a modulation format of interest for optical short and medium range communication.
Noise, nonlinear characteristics and component bandwidth have a complex relationship …

RF-Interconnect for High-Speed Intra/Inter Data Communications

Y Kim - 2017 - escholarship.org
In the earlier days of the Complementary Metal Oxide Semiconductor (CMOS) industry,
much effort was dedicated to the performance of device speed and number of transistors per …

[PDF][PDF] 3.15 A Theory of Coding for Chip-to-Chip Communication

MA Shokrollahi - Coding Theory in the Time of Big Data, 2017 - d-nb.info
Modern electronic devices consist of a multitude of IC components: the processor, the
memory, the RF modem and the baseband chip (in wireless devices), and the graphics …

[PDF][PDF] All-digital clock and data recovery architectures

SI Ahmed - 2010 - repository.library.carleton.ca
Abstract Clock and Data Recovery (CDR) circuits form an indispensable part of a Serializer-
Deserializer system. Once the equalizer removes the distortion, the CDR circuit can recover …

[引用][C] Hybrid NRZ/Multi-Tone Signaling for High-Speed Low-Power Wireline Transceivers

K Gharibdoust - 2016 - EPFL

[引用][C] Ein uss von Nichtlinearität, Rauschen und Bandbreite für das PAM4-Modulationsformat

N Neumann, Z al-Husseini, D Plettemeier