Emerging NVM: A survey on architectural integration and research challenges
There has been a surge of interest in Non-Volatile Memory (NVM) in recent years. With
many advantages, such as density and power consumption, NVM is carving out a place in …
many advantages, such as density and power consumption, NVM is carving out a place in …
A survey of architectural approaches for managing embedded DRAM and non-volatile on-chip caches
Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large
increase in the size of on-chip caches. Since SRAM has low density and consumes large …
increase in the size of on-chip caches. Since SRAM has low density and consumes large …
Heteroos: Os design for heterogeneous memory management in datacenter
S Kannan, A Gavrilovska, V Gupta… - Proceedings of the 44th …, 2017 - dl.acm.org
Heterogeneous memory management combined with server virtualization in datacenters is
expected to increase the software and OS management complexity. State-of-the-art …
expected to increase the software and OS management complexity. State-of-the-art …
FREE-p: Protecting non-volatile memory against both hard and soft errors
Emerging non-volatile memories such as phase-change RAM (PCRAM) offer significant
advantages but suffer from write endurance problems. However, prior solutions are oblivious …
advantages but suffer from write endurance problems. However, prior solutions are oblivious …
Bbb: Simplifying persistent programming using battery-backed buffers
M Alshboul, P Ramrakhyani, W Wang… - … Symposium on High …, 2021 - ieeexplore.ieee.org
Non-volatile memory (NVM) is poised to augment or replace DRAM as main memory. With
the right abstraction and support, non-volatile main memory (NVMM) can provide an …
the right abstraction and support, non-volatile main memory (NVMM) can provide an …
i2WAP: Improving non-volatile cache lifetime by reducing inter- and intra-set write variations
Modern computers require large on-chip caches, but the scalability of traditional SRAM and
eDRAM caches is constrained by leakage and cell density. Emerging non-volatile memory …
eDRAM caches is constrained by leakage and cell density. Emerging non-volatile memory …
Modeling, architecture, and applications for emerging memory technologies
Y Xie - IEEE design & test of computers, 2011 - ieeexplore.ieee.org
Spin-transfer torque RAM and phase-change RAM are vying to become the next-generation
embedded memory, offering high speed, high density, and nonvolatility. This article …
embedded memory, offering high speed, high density, and nonvolatility. This article …
Delivering on the promise of universal memory for spin-transfer torque RAM (STT-RAM)
Spin-Transfer Torque RAM (STT-RAM) has emerged as a potential candidate for Universal
memory. However, there are two challenges to using STT-RAM in memory system design:(1) …
memory. However, there are two challenges to using STT-RAM in memory system design:(1) …
Coset coding to extend the lifetime of memory
AN Jacobvitz, R Calderbank… - 2013 IEEE 19th …, 2013 - ieeexplore.ieee.org
Some recent memory technologies, including phase change memory (PCM), have lifetime
reliabilities that are affected by write operations. We propose the use of coset coding to …
reliabilities that are affected by write operations. We propose the use of coset coding to …
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being
explored as potential replacements to existing on-chip caches or main memories for future …
explored as potential replacements to existing on-chip caches or main memories for future …