From MTJ device to hybrid CMOS/MTJ circuits: A review

VK Joshi, P Barla, S Bhat, BK Kaushik - IEEE Access, 2020 - ieeexplore.ieee.org
Spintronics is one of the growing research areas which has the capability to overcome the
issues of static power dissipation and volatility suffered by the complementary metal-oxide …

Prime: A novel processing-in-memory architecture for neural network computation in reram-based main memory

P Chi, S Li, C Xu, T Zhang, J Zhao, Y Liu… - ACM SIGARCH …, 2016 - dl.acm.org
Processing-in-memory (PIM) is a promising solution to address the" memory wall"
challenges for future computer systems. Prior proposed PIM architectures put additional …

Drisa: A dram-based reconfigurable in-situ accelerator

S Li, D Niu, KT Malladi, H Zheng, B Brennan… - Proceedings of the 50th …, 2017 - dl.acm.org
Data movement between the processing units and the memory in traditional von Neumann
architecture is creating the" memory wall" problem. To bridge the gap, two approaches, the …

Pinatubo: A processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories

S Li, C Xu, Q Zou, J Zhao, Y Lu, Y Xie - Proceedings of the 53rd Annual …, 2016 - dl.acm.org
Processing-in-memory (PIM) provides high bandwidth, massive parallelism, and high
energy efficiency by implementing computations in main memory, therefore eliminating the …

Recnmp: Accelerating personalized recommendation with near-memory processing

L Ke, U Gupta, BY Cho, D Brooks… - 2020 ACM/IEEE 47th …, 2020 - ieeexplore.ieee.org
Personalized recommendation systems leverage deep learning models and account for the
majority of data center AI cycles. Their performance is dominated by memory-bound sparse …

PIM-enabled instructions: A low-overhead, locality-aware processing-in-memory architecture

J Ahn, S Yoo, O Mutlu, K Choi - ACM SIGARCH Computer Architecture …, 2015 - dl.acm.org
Processing-in-memory (PIM) is rapidly rising as a viable solution for the memory wall crisis,
rebounding from its unsuccessful attempts in 1990s due to practicality concerns, which are …

SpaceA: Sparse matrix vector multiplication on processing-in-memory accelerator

X Xie, Z Liang, P Gu, A Basak, L Deng… - … Symposium on High …, 2021 - ieeexplore.ieee.org
Sparse matrix-vector multiplication (SpMV) is an important primitive across a wide range of
application domains such as scientific computing and graph analytics. Due to its intrinsic …

Transpim: A memory-based acceleration via software-hardware co-design for transformer

M Zhou, W Xu, J Kang, T Rosing - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
Transformer-based models are state-of-the-art for many machine learning (ML) tasks.
Executing Transformer usually requires a long execution time due to the large memory …

Data reorganization in memory using 3D-stacked DRAM

B Akin, F Franchetti, JC Hoe - ACM SIGARCH Computer Architecture …, 2015 - dl.acm.org
In this paper we focus on common data reorganization operations such as shuffle,
pack/unpack, swap, transpose, and layout transformations. Although these operations …

Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective

Y Cheng, X Guo, VF Pavlidis - Integration, 2022 - Elsevier
In the past decade, monolithic three dimensional integrated circuits (M3D-ICs) advance fast
and demonstrate several important breakthroughs in the fabrication process and circuit level …