Pathfinder: High-Resolution Control-Flow Attacks Exploiting the Conditional Branch Predictor
This paper introduces novel attack primitives that enable adversaries to leak (read) and
manipulate (write) the path history register (PHR) and the prediction history tables (PHTs) of …
manipulate (write) the path history register (PHR) and the prediction history tables (PHTs) of …
Sok: Analysis of root causes and defense strategies for attacks on microarchitectural optimizations
NR Holtryd, M Manivannan… - 2023 IEEE 8th European …, 2023 - ieeexplore.ieee.org
Microarchitectural optimizations are expected to play a crucial role in ensuring performance
scalability in the post-Moore era. However, recent attacks have demonstrated that these …
scalability in the post-Moore era. However, recent attacks have demonstrated that these …
Modeling, Derivation, and Automated Analysis of Branch Predictor Security Vulnerabilities
With the intensification of microarchitectural side-channel attacks targeting branch
predictors, the security boundary of computer systems and users' security-critical data are …
predictors, the security boundary of computer systems and users' security-critical data are …
Defensive Design of Saturating Counters Based on Differential Privacy
D Liu, L Zhao, P Yang, BY Wang, R Hou… - arXiv preprint arXiv …, 2022 - arxiv.org
The saturating counter is the basic module of the dynamic branch predictor, which involves
the core technique to improve instruction level parallelism performance in modern …
the core technique to improve instruction level parallelism performance in modern …
[图书][B] Adaptive Microarchitectural Optimizations to Improve Performance and Security of Multi-Core Architectures
NR Holtryd - 2023 - search.proquest.com
With the current technological barriers, microarchitectural optimizations are increasingly
important to ensure performance scalability of computing systems. The shift to multi-core …
important to ensure performance scalability of computing systems. The shift to multi-core …