Unified theory of the capacitance behavior in LDMOS devices

KN Kaushal, NR Mohapatra - IEEE Transactions on Electron …, 2021 - ieeexplore.ieee.org
This article reviews and provides physical insights into the anomalous capacitance behavior
of laterally diffused MOS (LDMOS) transistors. It is shown that the modulation of channel/drift …

BSIM-HV: High-voltage MOSFET model including quasi-saturation and self-heating effect

H Agarwal, C Gupta, R Goel… - … on Electron Devices, 2019 - ieeexplore.ieee.org
A BSIM-based compact model for a high-voltage MOSFET is presented. The model uses the
BSIM-BULK (formerly BSIM6) model at its core, which has been extended to include the …

SP-HV: A scalable surface-potential-based compact model for LDMOS transistors

W Yao, G Gildenblat, CC McAndrew… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
This paper introduces a scalable compact model of lateral double-diffused MOS (LDMOS)
transistors. The new model, ie, the Surface-Potential-based High-Voltage MOS (SP-HV), is …

A physics-based analytical compact model for the drift region of the HV-MOSFET

A Bazigos, F Krummenacher, JM Sallese… - IEEE transactions on …, 2011 - ieeexplore.ieee.org
This paper presents a novel physics-based analytical compact model for the drift region of a
high-voltage metal–oxide–semiconductor field-effect transistor (HV-MOSFET). According to …

Characterization and modeling of 14-/16-nm FinFET-based LDMOS

A Kar, SS Parihar, JZ Huang, H Zhang… - … on Electron Devices, 2023 - ieeexplore.ieee.org
Due to the significant advancement of system-on-chip (SoC) based architectures in IC
technology, FinFET-based laterally diffused MOS (LDMOS) FETs are crucial for integrating …

Compact modeling of LDMOS transistors for extreme environment analog circuit design

AS Kashyap, HA Mantooth, TA Vo… - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
The cryogenic characterization (93 K/-180∘C to 300 K/27 ^∘C) and compact modeling of a
high-voltage (HV) laterally diffused MOS (LDMOS) transistor that exhibits carrier freeze-out …

PSPHV: A surface-potential-based model for LDMOS transistors

K Xia, CC McAndrew… - … on Electron Devices, 2019 - ieeexplore.ieee.org
This article presents PSPHV, a surface-potential-based compact model for laterally diffused
MOS (LDMOS) transistors. PSPHV includes a new drain voltage scaling technique that …

Effect of access region and field plate on capacitance behavior of GaN HEMT

K Sharma, A Dasgupta, S Ghosh… - … on Electron Devices …, 2015 - ieeexplore.ieee.org
Incorporation of Field Plate in High Electron Mobility Transistors (HEMTs) improves the
device breakdown voltage but on the other hand, increases the device Capacitance. It has a …

Analysis and modeling of the snapback voltage for varying buried oxide thickness in SOI-LDMOS transistors

KNS Nikhil, N DasGupta, A DasGupta… - … on Electron Devices, 2016 - ieeexplore.ieee.org
In this paper, for the first time, we report a nonmonotonic dependence of the snapback
voltage (V sb) on the buried oxide thickness (tBOX) in silicon-on-insulator laterally double …

A High-Performance and Low HCI Degradation LDMOS Device With a Hybrid Field Plate

S Yu, R Chen, W Shao, W Yu, X Zhao… - IEEE Journal of the …, 2024 - ieeexplore.ieee.org
In this paper, a high-performance and low-HCI (Hot carrier injection) degradation LDMOS
(Lateral double diffused metal oxide semiconductor) device is introduced. It consists of an …