A survey paper on design and implementation of multipliers for digital system applications

S Immareddy, A Sundaramoorthy - Artificial Intelligence Review, 2022 - Springer
Multiplication is one of the essential functions in all digital systems. The evaluation of digital
system, have brought out new challenges in VLSI (Very Large Scale Integration) designing …

A majority-based imprecise multiplier for ultra-efficient approximate image multiplication

F Sabetzadeh, MH Moaiyeri… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Approximate computing is an emerging approach for reducing the energy consumption and
design complexity in many applications where accuracy is not a crucial necessity. In this …

Improving power of DSP and CNN hardware accelerators using approximate floating-point multipliers

V Leon, T Paparouni, E Petrongonas… - ACM Transactions on …, 2021 - dl.acm.org
Approximate computing has emerged as a promising design alternative for delivering power-
efficient systems and circuits by exploiting the inherent error resiliency of numerous …

Speed, power and area efficient 2D FIR digital filter using vedic multiplier with predictor and reusable logic

VD Christilda, A Milton - Analog Integrated Circuits and Signal Processing, 2021 - Springer
The main goal of this paper is to design an efficient 2D FIR digital filter for digital image
processing and digital signal processing applications. To optimize filter speed, area and …

High-throughput low power area efficient 17-bit 2's complement multilayer perceptron components and architecture for on-chip Machine Learning in implantable …

BJ Romaine, MP Martín - IEEE Access, 2022 - ieeexplore.ieee.org
In this manuscript the authors, design new hardware efficient combinational building blocks
for a Multi Layer Perceptron (MLP) unit which eliminates the need for hardware generic …

Implementation of VLSI on Signal Processing-Based Digital Architecture Using AES Algorithm.

M Marimuthu, S Rajendran… - Computers …, 2023 - search.ebscohost.com
Continuous improvements in very-large-scale integration (VLSI) technology and design
software have significantly broadened the scope of digital signal processing (DSP) …

From Circuits to SoC Processors: Arithmetic Approximation Techniques & Embedded Computing Methodologies for DSP Acceleration

V Leon - arXiv preprint arXiv:2302.12194, 2023 - arxiv.org
The computing industry is forced to find alternative design approaches and computing
platforms to sustain increased power efficiency, while providing sufficient performance …

Design Space Exploration on High-Order QAM Demodulation Circuits: Algorithms, Arithmetic and Approximation Techniques

I Stratakos, V Leon, G Armeniakos, G Lentaris… - Electronics, 2021 - mdpi.com
Every new generation of wireless communication standard aims to improve the overall
performance and quality of service (QoS), compared to the previous generations. Increased …

Low power Dadda multiplier using approximate almost full adder and Majority logic based adder compressors

KC Pathak, AD Darji, JN Sarvaiya - 2022 IEEE Region 10 …, 2022 - ieeexplore.ieee.org
An Approximate computing is widely used to have energy-efficient system design in Very
Large-Scale Integration (VLSI). This approach is best suited for signal processing and …

VLSI design and comparative analysis of several types of fixed and simple precision floating point multipliers

AJ Pérez, MG Navarro, VMV De la Cruz… - … : Cultura Científica y …, 2021 - dialnet.unirioja.es
Multiplication is an arithmetic operation that has a meaningful impact on the performance of
several real-life applications, such as digital signal and image processing. Analysis and …