Advanced mobile and wearable systems

L Jóźwiak - Microprocessors and microsystems, 2017 - Elsevier
The recent spectacular progress in the microelectronic, information, communication, material
and sensor technologies created a big stimulus towards development of smart …

[PDF][PDF] An instruction level energy characterization of arm processors

E Vasilakis - Foundation of Research and Technology Hellas, Inst …, 2015 - ics.forth.gr
As mobile devices and data-centers expand to cover global needs for services and personal
computing, power consumption of systems and devices has become the most prevalent …

ASAM: automatic architecture synthesis and application mapping

L Jozwiak, M Lindwer, R Corvino, P Meloni… - Microprocessors and …, 2013 - Elsevier
This paper focuses on mastering the automatic architecture synthesis and application
mapping for heterogeneous massively-parallel MPSoCs based on customizable application …

Simultaneous control of power/ground current, wakeup time and transistor overhead in power gated circuits

Y Lee, DK Jeong, T Kim - 2008 IEEE/ACM International …, 2008 - ieeexplore.ieee.org
Power gating in circuits is one of the effective technologies to allow low leakage and high
performance operations. This work aims to analyze and establish the relations between the …

Development of energy models for design space exploration of embedded many-core systems

C Klarhorst, M Flasskamp, J Ax, T Jungeblut… - arXiv preprint arXiv …, 2018 - arxiv.org
This paper introduces a methodology to develop energy models for the design space
exploration of embedded many-core systems. The design process of such systems can …

Automatic instruction-set architecture synthesis for VLIW processor cores in the ASAM project

R Jordans, L Jóźwiak, H Corporaal… - Microprocessors and …, 2017 - Elsevier
The design of high-performance application-specific multi-core processor systems still is a
time consuming task which involves many manual steps and decisions that need to be …

Buildmaster: Efficient asip architecture exploration through compilation and simulation result caching

R Jordans, E Diken, L Jóświak… - … Symposium on Design …, 2014 - ieeexplore.ieee.org
In this paper we introduce and discuss the Build-Master framework. This framework supports
the design space exploration of application specific VLIW processors and offers automated …

[PDF][PDF] Heterogeneous MPSoC technology for modern cyber-physical systems

L Jozwiak - Informacije MIDEM, 2014 - 212.235.187.51
Spectacular progress in microelectronics and information technology created a big stimulus
towards development of advanced embedded and cyber-physical systems, but also …

[PDF][PDF] ALKALMAZÁS-SPECIFIKUS MIKROPROCESSZORBA INTEGRÁLHATÓ OSZTÓ EGYSÉGEK MEGVALÓSÍTÁSA ÉS VIZSGÁLATA

H Péter - eet.bme.hu
Abstract The General Purpose Processors can be used for everything because of their easy
programming. The GPPs had to execute more and more types of tasks during the time, but …

[PDF][PDF] Buildmaster: Efficient ASIP Architecture Exploration

SR Caching - Citeseer
Buildmaster: Efficient ASIP Architecture Exploration Page 1 /department of electrical
engineering www.asam-project.org 1. ASIP exploration Application Specific Instruction-set …