F1: A fast and programmable accelerator for fully homomorphic encryption
Fully Homomorphic Encryption (FHE) allows computing on encrypted data, enabling secure
offloading of computation to untrusted servers. Though it provides ideal security, FHE is …
offloading of computation to untrusted servers. Though it provides ideal security, FHE is …
F1: A fast and programmable accelerator for fully homomorphic encryption (extended version)
Fully Homomorphic Encryption (FHE) allows computing on encrypted data, enabling secure
offloading of computation to untrusted serves. Though it provides ideal security, FHE is …
offloading of computation to untrusted serves. Though it provides ideal security, FHE is …
[图书][B] Discrete cosine transform
H Ochoa-Dominguez, KR Rao - 2019 - taylorfrancis.com
Many new DCT-like transforms have been proposed since the first edition of this book. For
example, the integer DCT that yields integer transform coefficients, the directional DCT to …
example, the integer DCT that yields integer transform coefficients, the directional DCT to …
A reconfigurable multiple transform selection architecture for VVC
Video coding plays an important role in the highly information-based world as videos
contribute the largest part of network traffic. The latest video coding standard Versatile Video …
contribute the largest part of network traffic. The latest video coding standard Versatile Video …
A pipelined 2D transform architecture supporting mixed block sizes for the VVC standard
For the next-generation video coding standard Versatile Video Coding (VVC), several new
contributions have been proposed to improve the coding efficiency, especially in the …
contributions have been proposed to improve the coding efficiency, especially in the …
A 2.6 TOPS/W 16-bit fixed-point convolutional neural network learning processor in 65-nm CMOS
We present a convolutional neural network (CNN) learning processor, which accelerates the
stochastic gradient descent (SGD) with a momentum-based training algorithm in 16-bit fixed …
stochastic gradient descent (SGD) with a momentum-based training algorithm in 16-bit fixed …
A fully pipelined hardware architecture for intra prediction of HEVC
B Min, Z Xu, RCC Cheung - … on Circuits and Systems for Video …, 2016 - ieeexplore.ieee.org
Ultrahigh definition (UHD), such as 4K/8K, is becoming the mainstream of video resolution
nowadays. High Efficiency Video Coding (HEVC) is the emerging video coding standard to …
nowadays. High Efficiency Video Coding (HEVC) is the emerging video coding standard to …
A hardware-oriented IME algorithm for HEVC and its hardware implementation
Y Fan, L Huang, B Hao, X Zeng - IEEE Transactions on Circuits …, 2017 - ieeexplore.ieee.org
High Efficiency Video Coding (HEVC), the latest video coding standard, aims to provide
coding performance that is much superior to that of its predecessor, H. 264, especially for …
coding performance that is much superior to that of its predecessor, H. 264, especially for …
Streaming Matrix Transposition on FPGAs Using Distributed Memories
M Henriksson, O Gustafsson - 2023 IEEE Nordic Circuits and …, 2023 - ieeexplore.ieee.org
Matrix transposition, the procedure of swapping rows and columns of a matrix, has
applications in various signal processing applications, such as massive multiple-input …
applications in various signal processing applications, such as massive multiple-input …
Fast algorithms and VLSI architecture design for HEVC intra-mode decision
X Huang, H Jia, B Cai, C Zhu, J Liu, M Yang… - Journal of Real-Time …, 2016 - Springer
The emerging intra-coding tools of High Efficiency Video Coding (HEVC) standard can
achieve up to 36% bit-rate reduction compared to H. 264/AVC, but with significant …
achieve up to 36% bit-rate reduction compared to H. 264/AVC, but with significant …