The increasing complexity and size of digital designs, in conjunction with the lack of a potent
verification methodology that can effectively cope with this trend, continue to inspire …

The continuing increase in functional requirements of modern hardware designs means the
traditional functional verification process becomes inefficient in meeting the time-to-market …

The important contemporary issue of VLSI design verification is its time-consuming. The
hardware model, written, for instance, with VHDL, is verified by formal and dynamic …

The functional verification process is one of the most expensive steps in integrated circuit
manufacturing. Functional coverage is the most important metric in the entire verification …

At present, the functional verification of a device represents the highest cost during
manufacturing. To reduce that cost, several methods have been suggested. In this work we …

In the modern era, there is a fast-growing demand for new and complicated digital systems.
Advancements in CMOS fabrication technologies has accommodated chip fabrication of …

Mutual Information is an information theoretic measure designed to quantify the amount of
similarity between two random variables ranging over two sets. In recent work we have use it …

Biased random test generation is one of the most important methods for the verification of
modern complex processors. As the complexity of processors grows, the bottleneck remains …

Functional verification is widely recognized as the bottleneck of the hardware design cycle.
The coverage-driven verification approach makes coverage the core engine that drives the …

Testing of FPGAs is gaining more and more interest because of the application of FPGA
devices in many safety-critical systems. We propose GABES, a tool for the generation of test …