This paper presents a 14-b 20-MS/s energy-efficient SAR ADC in 65-nm CMOS technology
for portable medical ultrasound systems. To break the limitation of the ADC linearity on the …

This article reviews design challenges for low-power CMOS high-speed analog-to-digital
converters (ADCs). Basic ADC converter architectures (flash ADCs, interpolating and folding …

This paper presents a 10-bit ultra-low power successive approximation register (SAR)
analog-to-digital converter (ADC) for implantable medical devices. To achieve the nanowatt …

A comparator comprises a cross coupled circuit which produces a positive feedback. In
conventional comparators, the mismatch between the cross coupled circuits determines the …

A novel Resistive random access memory (ReRAM)-based Compute-in-memory (CIM)
macro is proposed to overcome the limited accuracy and throughput of a conventional …

This paper presents a 9-bit differential, minimum-powered, successive approximation
register (SAR) ADC intended for implantable devices or sensors. Such applications demand …

This work reviews the design challenges of CMOS flash type Analog-to-Digital Converter
(ADC) for making high bit resolution, low area, low noise, low offset, and power-efficient …

In this paper, a 5-bit 500MS/s flash analog-to-digital converter (ADC) with temperature-
compensated inverter-based comparators is proposed. In the proposed ADC, a …

An 8-bit 1-GS/s hybrid analog-to-digital converter (ADC) for high-speed low-power
applications is introduced. It has a subranging architecture with a 3-bit flash ADC as a first …

Digitizing RF signals using few bit ADCs can provide system advantages in terms of reduced
power dissipation, wider sampling bandwidth, and decreased demand for digital throughput …