Instruction level power analysis and optimization of software
The increasing popularity of power constrained mobile computers and embedded
computing applications drives the need for analyzing and optimizing power in all the …
computing applications drives the need for analyzing and optimizing power in all the …
A survey of optimization techniques targeting low power VLSI circuits
A Survey of Optimization Techniques Targeting Low Power VLSI Circuits Page 1 A Survey of
Optimization Techniques Targeting Low Power VLSI Circuits Srinivas Devadas Sharad Malik …
Optimization Techniques Targeting Low Power VLSI Circuits Srinivas Devadas Sharad Malik …
Power analysis and minimization techniques for embedded DSP software
Power is becoming a critical constraint for designing embedded applications. Current power
analysis techniques based on circuit-level or architectural-level simulation are either …
analysis techniques based on circuit-level or architectural-level simulation are either …
Software power estimation and optimization for high performance, 32-bit embedded processors
JT Russell, MF Jacome - … in Computers and Processors (Cat. No …, 1998 - ieeexplore.ieee.org
A software energy estimation model is presented for a family of high performance,
integrated, 32-bit embedded RISC processors. This model is significantly less complex than …
integrated, 32-bit embedded RISC processors. This model is significantly less complex than …
A framework for estimation and minimizing energy dissipation of embedded HW/SW systems
Y Li, J Henkel - Proceedings of the 35th annual Design Automation …, 1998 - dl.acm.org
Embedded system design is one of the most challenging tasks in VLSI CAD because of the
vast amount of system parameters to fix and the great variety of constraints to meet. In this …
vast amount of system parameters to fix and the great variety of constraints to meet. In this …
[PDF][PDF] A low power hardware/software partitioning approach for core-based embedded systems
J Henkel - Proceedings of the 36th annual ACM/IEEE Design …, 1999 - dl.acm.org
We present a novel approach that minimizes the power consumption of embedded core-
based systems through hardware/software partitioning. Our approach is based on the idea …
based systems through hardware/software partitioning. Our approach is based on the idea …
The energy efficiency of IRAM architectures
R Fromm, S Perissakis, N Cardwell… - ACM SIGARCH …, 1997 - dl.acm.org
Portable systems demand energy efficiency in order to maximize battery life. IRAM
architectures, which combine DRAM and a processor on the same chip in a DRAM process …
architectures, which combine DRAM and a processor on the same chip in a DRAM process …
Power Analysis of a 32‐bit Embedded Microcontroller
V Tiwari, MTC Lee - VLSI Design, 1998 - Wiley Online Library
A new approach for power analysis of microprocessors has recently been proposed [14].
The idea is to look at the power consumption in a microprocessor from the point of view of …
The idea is to look at the power consumption in a microprocessor from the point of view of …
[PDF][PDF] Energy characterization based on clustering
H Mehta, RM Owens, MJ Irwin - proceedings of the 33rd annual design …, 1996 - dl.acm.org
We illustrate a new method to characterize the energy dissipation of circuits by collapsing
closely related input transition vectors and energy patterns into capacitive coe cients. Energy …
closely related input transition vectors and energy patterns into capacitive coe cients. Energy …
TEM2P2EST: A Thermal Enabled Multi-model Power/Performance ESTimator
A Dhodapkar, C How Lim, G Cai… - Power-Aware Computer …, 2001 - Springer
Abstract We present TEM 2 P 2 EST, a flexible, cycle-accurate microarchitectural
power/performance analysis tool based on SimpleScalar. The goal was to build a “flexible” …
power/performance analysis tool based on SimpleScalar. The goal was to build a “flexible” …