H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof the devices being of types …

Recently, both industry and academia have proposed many different roadmaps for the future
of DRAM. Consequently, there is a growing need for an extensible DRAM simulator, which …

Growing main memory capacity has fueled the development of in-memory big data
management and processing. By eliminating disk I/O bottleneck, it is now possible to support …

Various new nonvolatile memory (NVM) technologies have emerged recently. Among all the
investigated new NVM candidate technologies, spin-torque-transfer memory (STT-RAM, or …

Several system-level operations trigger bulk data copy or initialization. Even though these
bulk data operations do not require any computation, current systems transfer a large …

The scalability of DRAM faces challenges from increasing power consumption and the
difficulty of building high aspect ratio capacitors. Consequently, emerging memory …

As computation becomes increasingly limited by data movement and energy consumption,
exploiting locality throughout the memory hierarchy becomes critical to continued …

Future GPUs and other high-performance throughput processors will require multiple TB/s of
bandwidth to DRAM. Satisfying this bandwidth demand within an acceptable energy budget …

Modern DRAMs have multiple banks to serve multiple memory requests in parallel.
However, when two requests go to the same bank, they have to be served serially …

This paper introduces a new DRAM design that enables fast and energy-efficient bulk data
movement across subarrays in a DRAM chip. While bulk data movement is a key operation …