Bingo spatial data prefetcher
M Bakhshalipour, M Shakerinava… - … Symposium on High …, 2019 - ieeexplore.ieee.org
Applications extensively use data objects with a regular and fixed layout, which leads to the
recurrence of access patterns over memory regions. Spatial data prefetching techniques …
recurrence of access patterns over memory regions. Spatial data prefetching techniques …
Evaluation of hardware data prefetchers on server processors
M Bakhshalipour, S Tabaeiaghdaei… - ACM Computing …, 2019 - dl.acm.org
Data prefetching, ie, the act of predicting an application's future memory accesses and
fetching those that are not in the on-chip caches, is a well-known and widely used approach …
fetching those that are not in the on-chip caches, is a well-known and widely used approach …
Domino temporal data prefetcher
M Bakhshalipour, P Lotfi-Kamran… - … Symposium on High …, 2018 - ieeexplore.ieee.org
Big-data server applications frequently encounter data misses, and hence, lose significant
performance potential. One way to reduce the number of data misses or their effect is data …
performance potential. One way to reduce the number of data misses or their effect is data …
Unlimited vector extension with data streaming support
Unlimited vector extension (UVE) is a novel instruction set architecture extension that takes
streaming and SIMD processing together into the modern computing scenario. It aims to …
streaming and SIMD processing together into the modern computing scenario. It aims to …
Fast data delivery for many-core processors
M Bakhshalipour, P Lotfi-Kamran… - IEEE Transactions …, 2018 - ieeexplore.ieee.org
Server workloads operate on large volumes of data. As a result, processors executing these
workloads encounter frequent L1-D misses. In a many-core processor, an L1-D miss causes …
workloads encounter frequent L1-D misses. In a many-core processor, an L1-D miss causes …
PrefetchX: Cross-core cache-agnostic prefetcher-based side-channel attacks
In this paper, we reveal the existence of a new class of prefetcher, the XPT prefetcher, in
modern Intel processors which has never been officially detailed. It speculatively issues a …
modern Intel processors which has never been officially detailed. It speculatively issues a …
Reducing writebacks through in-cache displacement
Non-Volatile Memory (NVM) technology is a promising solution to fulfill the ever-growing
need for higher capacity in the main memory of modern systems. Despite having many great …
need for higher capacity in the main memory of modern systems. Despite having many great …
New cross-core cache-agnostic and prefetcher-based side-channels and covert-channels
In this paper, we reveal the existence of a new class of prefetcher, the XPT prefetcher, in the
modern Intel processors which has never been officially documented. It speculatively issues …
modern Intel processors which has never been officially documented. It speculatively issues …
Compiler-assisted data streaming for regular code structures
The performance of modern processors is often limited by execution stalls resulting from
long memory access latencies. Compile-time optimizations, deep cache hierarchies and …
long memory access latencies. Compile-time optimizations, deep cache hierarchies and …
Adaptive resource prefetching with spatial–temporal and topic information for educational cloud storage systems
Prefetching proactively resources at datanodes within distribution networks plays a key role
in improving the efficiency of data access for e-learning, which requires assistance from …
in improving the efficiency of data access for e-learning, which requires assistance from …