This paper explores the Vertical tunnel FET with the introduced layer of SiGe within the
channel/source junction using TCAD. As Tunnel FETs smothered the 60 mV/decade …

Power dissipation is the key factor that is considered while designing low-power circuits.
Complementary metal oxide semiconductor (CMOS) technology faces a major challenge in …

Artificial intelligence (AI), machine learning, and advanced electronic circuits involve
learning from every data input and using those inputs to generate new rules for future …

This paper reports the performance assessment of vertical silicon nanowire TFET (V-
siNWTFET) design for biosensor applications using dielectric-modulation and gate underlap …

This chapter provides an overview of the message-oriented architectural pattern. The core
components of this type of system are explained, and an overview of common messaging …

The unique characteristics of nanowire field effect transistors (NW FETs), such as high
electron mobility, low power consumption, and scalability, have made them a promising …

In this work, we propose and simulate an ultrasensitive, label-free, and charge/dielectric
modulated Si: HfO2 ferroelectric junctionless tunnel field effect transistor (FE-JL-TFET) …

This study presents a new dual‐metal dopingless tunnel field effect transistor with a
Germanium source (GeS‐DM‐DLT) for label‐free biomolecule detection. Introducing a Ge …

This chapter presents static random access memory (SRAM) cell design for low power
applications. It is well known that the mathematical modeling and manual computations of …

In recent decades, photovoltaic technology has significantly advanced, leading to cost-and
energy-efficient solutions. One of the promising approaches that has led to significant …