Tpu v4: An optically reconfigurable supercomputer for machine learning with hardware support for embeddings
In response to innovations in machine learning (ML) models, production workloads changed
radically and rapidly. TPU v4 is the fifth Google domain specific architecture (DSA) and its …
radically and rapidly. TPU v4 is the fifth Google domain specific architecture (DSA) and its …
Interconnection networks in petascale computer systems: A survey
R Trobec, R Vasiljević, M Tomašević… - ACM Computing …, 2016 - dl.acm.org
This article provides background information about interconnection networks, an analysis of
previous developments, and an overview of the state of the art. The main contribution of this …
previous developments, and an overview of the state of the art. The main contribution of this …
Resiliency at Scale: Managing {Google's}{TPUv4} Machine Learning Supercomputer
TPUv4 (Tensor Processing Unit) is Google's 3rd generation accelerator for machine learning
training, deployed as a 4096-node supercomputer with a custom 3D torus interconnect. In …
training, deployed as a 4096-node supercomputer with a custom 3D torus interconnect. In …
Simulating and evaluating interconnection networks with INSEE
This paper describes INSEE, a simulation framework developed at the University of the
Basque Country. INSEE is designed to carry out performance-related studies of …
Basque Country. INSEE is designed to carry out performance-related studies of …
A survey into performance and energy efficiency in HPC, cloud and big data environments
EC Inacio, MAR Dantas - International Journal of …, 2014 - inderscienceonline.com
The growing demand for performance observed in many organisations can still be
considered the main motivator for the evolution of high performance computing and, more …
considered the main motivator for the evolution of high performance computing and, more …
A survey on emerging issues in interconnection networks
Nowadays, the interconnection network is considered as an important architectural choice
for the future parallel system in many processors owing to the scalable nature of the …
for the future parallel system in many processors owing to the scalable nature of the …
Topological spin–charge gearbox on a real molecular magnet
In this work, using ab initio many-body theory and inspired by an idea suggested by GD
Mahan for an abstract N-dimensional chain composed of s-type atoms (Phys. Rev. Lett …
Mahan for an abstract N-dimensional chain composed of s-type atoms (Phys. Rev. Lett …
Lea-TN: leader election algorithm considering node and link failures in a torus network
A Biswas, AK Tripathi, S Aknine - The Journal of Supercomputing, 2021 - Springer
Torus network topology offers many advantages such as higher speed, lower latency, better
fairness, and lower energy consumption. For these kinds of benefits, nowadays, it is used to …
fairness, and lower energy consumption. For these kinds of benefits, nowadays, it is used to …
x-Folded TM: an efficient topology for interconnection networks
Massively parallel computers (MPCs) are currently being actively studied. Interconnection
networks are used for the connection of a significant number of processors in such parallel …
networks are used for the connection of a significant number of processors in such parallel …
L-networks: A topological model for regular 2D interconnection networks
C Camarero, C Martinez… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
A complete family of Cayley graphs of degree four, denoted as L-networks, is considered in
this paper. L-networks are 2D mesh-based topologies with wrap-around connections. L …
this paper. L-networks are 2D mesh-based topologies with wrap-around connections. L …