Component Dependencies Based Network-on-Chip Test
L Huang, T Zhao, Z Wang, J Zhan… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
On-line test of NoC is essential for its reliability. This paper proposed an integral test solution
for on-line test of NoC to reduce the test cost and improve the reliability of NOC. The test …
for on-line test of NoC to reduce the test cost and improve the reliability of NOC. The test …
Fault-tolerant mesh-based NoC with router-level redundancy
The aggressively scaled CMOS technology is increasingly threatening the dependability of
network-on-chips (NoCs) architecture. In a mesh-based NoC, a faulty router or broken link …
network-on-chips (NoCs) architecture. In a mesh-based NoC, a faulty router or broken link …
Multiple fault mitigation in network-on-chip architectures through a bit-shuffling method
R Mercier - 2021 - theses.hal.science
Since several decades, fault tolerance has become a major research field due to transistor
shrinking and power scaling in system-on-chips. Especially, faults occurring to Network-on …
shrinking and power scaling in system-on-chips. Especially, faults occurring to Network-on …
Protector: A permanent fault resilient router architecture for network on chip
The decreasing size of the transistor has increased the vulnerability towards faults.
Increasing number of cores on a single chip has made the concept of Network on Chip …
Increasing number of cores on a single chip has made the concept of Network on Chip …
FTHR: Fault Tolerant Hypercube-based Routing for NoCs
R Kourdy, A Rajabzadeh - 2019 9th International Conference …, 2019 - ieeexplore.ieee.org
Network-on-chips are a novel communications infrastructure for decoupling the
communication elements from processing cores, with the goal of eliminating the challenges …
communication elements from processing cores, with the goal of eliminating the challenges …