Intel has recently introduced Intel® Transactional Synchronization Extensions (Intel® TSX)
in the Intel 4th Generation Core™ Processors. With Intel TSX, a processor can dynamically …

Graphics processor units (GPUs) are designed to efficiently exploit thread level parallelism
(TLP), multiplexing execution of 1000s of concurrent threads on a relatively smaller set of …

Question and Answer (Q&A) services, such as Stack Overflow, rely on a community of
programmers who post questions, provide and rate answers, to create what is termed" crowd …

Many applications with regular parallelism have been shown to benefit from using Graphics
Processing Units (GPUs). However, employing GPUs for applications with irregular …

Best-effort hardware transactional memory (HTM) allows complex operations to execute
atomically and in parallel, so long as hardware buffers do not overflow, and conflicts are not …

Providing fault tolerance especially to mission critical applications in order to detect transient
and permanent faults and to recover from them is one of the main necessity for processor …

Hardware transactional memory (HTM) is supported by widely-used commodity processors.
While the effectiveness of HTM has been evaluated based on small-scale multi-core …

GPUs transactional memory (TM) proposals to date have relied on lazy, value-based conflict
detection, assuming that GPUs can amortize the latency by executing other warps. In …

Technology scaling and process variation severely degrade the reliability of Chip
Multiprocessors (CMPs), especially their large cache blocks. To improve cache reliability, we …

Extracting high performance from modern chip multithreading (CMT) processors is a
complex task, especially for large CMT systems. Programmers must efficiently parallelize …