[图书][B] Programming Heterogeneous MPSoCs
JC Mazo, R Leupers - 2013 - Springer
This book is concerned with the improvement of the programming experience of today's and
upcoming embedded systems in the multimedia and wireless communication domains. In …
upcoming embedded systems in the multimedia and wireless communication domains. In …
High-level synthesis of digital circuits from template haskell and sdf-ap
HH Folmer, R Groote, MJG Bekooij - International Conference on …, 2022 - Springer
Functional languages as input specifications for HLS-tools allow to specify data
dependencies but do not contain a notion of time nor execution order. In this paper, we …
dependencies but do not contain a notion of time nor execution order. In this paper, we …
Automated Buffer Sizing of Dataflow Applications in a High-Level Synthesis Workflow
High-Level Synthesis (HLS) tools are mature enough to provide efficient code generation for
computation kernels on FPGA hardware. For more complex applications, multiple kernels …
computation kernels on FPGA hardware. For more complex applications, multiple kernels …
[图书][B] Embedded systems development: from functional models to implementations
This book offers readers broad coverage of techniques to model, verify and validate the
behavior and performance of complex distributed embedded systems. The authors attempt …
behavior and performance of complex distributed embedded systems. The authors attempt …
Communication storage optimization for static dataflow with access patterns under periodic scheduling and throughput constraint
GQ Wang, R Allen, HA Andrade… - Computers & Electrical …, 2014 - Elsevier
We address a recently introduced static dataflow model: the Static Dataflow with Access
Patterns (SDF-AP) model. For this model we present (1) a generalization of an existing …
Patterns (SDF-AP) model. For this model we present (1) a generalization of an existing …
Analysis techniques for static dataflow models with access patterns
Signal processing and multimedia applications are commonly specified using Static
Dataflow (SDF) models. The SDF model explicitly captures how much data is produced and …
Dataflow (SDF) models. The SDF model explicitly captures how much data is produced and …
Actors with stretchable access patterns
K Du, S Domas, M Lenczner - Integration, 2019 - Elsevier
In this article, we propose a new framework based on dataflow graphs to abstract and
analyze designs for hardware architectures. It is called Actors with Stretchable Access …
analyze designs for hardware architectures. It is called Actors with Stretchable Access …
Formal verification of timed synchronous dataflow graphs using Lustre
IE Bennour - Journal of Logical and Algebraic Methods in …, 2021 - Elsevier
The timed synchronous dataflow graph model is a graphical model of computation that
allows concurrency between processes. This model is widely used due to its expressive …
allows concurrency between processes. This model is widely used due to its expressive …
Tokens vs. signals: On conformance between formal models of dataflow and hardware
Designing hardware often involves several types of modeling and analysis, eg, in order to
check system correctness, to derive performance properties such as throughput, to optimize …
check system correctness, to derive performance properties such as throughput, to optimize …
A solution to overcome some limitations of SDF based models
K Du, S Domas, M Lenczner - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
For computer-aided hardware design, models are usually used to evaluate the designed
systems. But there is still a gap between models and their efficient implementations on a real …
systems. But there is still a gap between models and their efficient implementations on a real …