A suite of IEEE 1687 benchmark networks
The saturation of the IJTAG concept and its approval as the IEEE 1687 standard in 2014 has
generated a wave of research activities and created demand for a set of appropriate and …
generated a wave of research activities and created demand for a set of appropriate and …
A survey on security threats and countermeasures in IEEE test standards
The growth in complexity of Integrated Circuits (IC) is supported, amongst other factors, by
the development of standardized test infrastructures. The feasibility of both end …
the development of standardized test infrastructures. The feasibility of both end …
Specification and verification of security in reconfigurable scan networks
A large amount of on-chip infrastructure, such as design-for-test, debug, monitoring, or
calibration, is required for the efficient manufacturing, debug, and operation of complex …
calibration, is required for the efficient manufacturing, debug, and operation of complex …
Trustworthy reconfigurable access to on-chip infrastructure
MA Kochte, R Baranowski… - 2017 International Test …, 2017 - ieeexplore.ieee.org
The accessibility of on-chip embedded infrastructure for test, reconfiguration, or debug
poses a serious security problem. Access mechanisms based on IEEE Std 1149.1 (JTAG) …
poses a serious security problem. Access mechanisms based on IEEE Std 1149.1 (JTAG) …
Security against data-sniffing and alteration attacks in IJTAG
R Elnaggar, R Karri… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-
chip designs. However, a major security vulnerability in IJTAG has yet to be addressed …
chip designs. However, a major security vulnerability in IJTAG has yet to be addressed …
Optimization-based test scheduling for IEEE 1687 multi-power domain networks using Boolean satisfiability
The IEEE 1687 Std. provides an efficient access methodology for embedded instruments in
complex system-on-a-chip designs by introducing reconfigurable scan networks. This …
complex system-on-a-chip designs by introducing reconfigurable scan networks. This …
Test of reconfigurable modules in scan networks
Modern devices often include several embedded instruments, such as BIST interfaces,
sensors, calibration facilities. New standards, such as IEEE Std 1687, provide vehicles to …
sensors, calibration facilities. New standards, such as IEEE Std 1687, provide vehicles to …
On secure data flow in reconfigurable scan networks
P Raiola, B Thiemann, J Burchard… - … , Automation & Test …, 2019 - ieeexplore.ieee.org
Reconfigurable Scan Networks (RSNs) allow flexible access to embedded instruments for
post-silicon test, validation and debug or diagnosis. The increased observability and …
post-silicon test, validation and debug or diagnosis. The increased observability and …
Co-relation scan attack analysis (COSAA) on AES: A comprehensive approach
Scan based DfT is indispensable for IC testing in the semiconductor chip industry to ensure
correctness of chip, both functionally and structurally. Since a higher degree of fault …
correctness of chip, both functionally and structurally. Since a higher degree of fault …
Formal verification of secure reconfigurable scan network infrastructure
Reconfigurable scan networks (RSN) as standardized by IEEE Std 1687 allow flexible and
efficient access to on-chip infrastructure for test and diagnosis, post-silicon validation …
efficient access to on-chip infrastructure for test and diagnosis, post-silicon validation …