A survey of techniques for architecting and managing asymmetric multicore processors
S Mittal - ACM Computing Surveys (CSUR), 2016 - dl.acm.org
To meet the needs of a diverse range of workloads, asymmetric multicore processors
(AMPs) have been proposed, which feature cores of different microarchitecture or ISAs …
(AMPs) have been proposed, which feature cores of different microarchitecture or ISAs …
DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks
Data movement between the CPU and main memory is a first-order obstacle against improv
ing performance, scalability, and energy efficiency in modern systems. Computer systems …
ing performance, scalability, and energy efficiency in modern systems. Computer systems …
[HTML][HTML] Dynamic power management techniques in multi-core architectures: A survey study
KM Attia, MA El-Hosseini, HA Ali - Ain Shams Engineering Journal, 2017 - Elsevier
Multi-core processors support all modern electronic devices nowadays. However, power
management is one of the most critical issues in the design of today's microprocessors. The …
management is one of the most critical issues in the design of today's microprocessors. The …
Amdahl's law for tail latency
C Delimitrou, C Kozyrakis - Communications of the ACM, 2018 - dl.acm.org
Amdahl's law for tail latency Page 1 AUGUST 2018 | VOL. 61 | NO. 8 | COMMUNICATIONS
OF THE ACM 65 TRANSLATING THE IMPACT of Amdahl’s Law on tail latency provides new …
OF THE ACM 65 TRANSLATING THE IMPACT of Amdahl’s Law on tail latency provides new …
Flicker: A dynamically adaptive architecture for power limited multicore systems
P Petrica, AM Izraelevitz, DH Albonesi… - Proceedings of the 40th …, 2013 - dl.acm.org
Future microprocessors may become so power constrained that not all transistors will be
able to be powered on at once. These systems will be required to nimbly adapt to changes …
able to be powered on at once. These systems will be required to nimbly adapt to changes …
Pushing the limits of accelerator efficiency while retaining programmability
T Nowatzki, V Gangadhan… - … Symposium on High …, 2016 - ieeexplore.ieee.org
The waning benefits of device scaling have caused a push towards domain specific
accelerators (DSAs), which sacrifice programmability for efficiency. While providing huge …
accelerators (DSAs), which sacrifice programmability for efficiency. While providing huge …
A study of mobile device utilization
C Gao, A Gutierrez, M Rajan… - … analysis of systems …, 2015 - ieeexplore.ieee.org
Mobile devices are becoming more powerful and versatile than ever, calling for better
embedded processors. Following the trend in desktop CPUs, microprocessor vendors are …
embedded processors. Following the trend in desktop CPUs, microprocessor vendors are …
Enhancing server efficiency in the face of killer microseconds
A Mirhosseini, A Sriraman… - 2019 IEEE International …, 2019 - ieeexplore.ieee.org
We are entering an era of “killer microseconds” in data center applications. Killer
microseconds refer to μs-scale “holes” in CPU schedules caused by stalls to access fast I/O …
microseconds refer to μs-scale “holes” in CPU schedules caused by stalls to access fast I/O …
CuttleSys: Data-driven resource management for interactive services on reconfigurable multicores
N Kulkarni, G Gonzalez-Pumariega… - 2020 53rd Annual …, 2020 - ieeexplore.ieee.org
Multi-tenancy for latency-critical applications leads to resource interference and
unpredictable performance. Core reconfiguration opens up more opportunities for …
unpredictable performance. Core reconfiguration opens up more opportunities for …
The Dark Side of Silicon
The Dark Side of Silicon Amir M. Rahmani· Pasi Liljeberg Ahmed Hemani· Axel Jantsch Hannu
Tenhunen Editors The Dark Side of Silicon Energy E cient Computing in the Dark Silicon Era …
Tenhunen Editors The Dark Side of Silicon Energy E cient Computing in the Dark Silicon Era …