Modern computing systems employ significant heterogeneity and specialization to meet
performance targets at manageable power. However, memory latency bottlenecks remain …

Abstract Nascent Open Source Instruction Set Architectures such as OpenPOWER or RISC-
V, allow software/hardware co-designers to fully utilize the underlying hardware, modify it or …

Microarchitectural enhancements that improve performance generally, across many
workloads, are favored in superscalar processor design. Targeting general performance is …

Out-of-order cores rely on high-accuracy branch predictors to supply useful instructions to
the processor backend. However, there remains a large fraction of mispredictions caused by …

Modern OoO cores achieve high levels of performance using large instruction windows.
Scaling the window size improves performance by making visible more of the parallelism …

My advisor, Prof. Yale Patt has been instrumental in the completion of my Ph. D. program.
Thank you for inspiring my interest in computer architecture, for convincing me to pursue my …

Load-Dependent Branches (LDB) often do not exhibit regular patterns in their local or global
history and thus are inherently hard to predict correctly by conventional branch predictors …

Computing systems have become ubiquitous in the modern world but their design is far from
one-size-fits-all. From battery-powered devices to supercomputers, deployment …

The state-of-the-art branch predictor, TAGE, remains inefficient at identifying correlated
branches deep in a noisy global branch history. This dissertation argues this inefficiency is a …

High performance microprocessors have relied on accurate branch predictors to maintain
high instruction supply for over 30 years. Unfortunately, as instruction windows and pipeline …