Nuberu: Reliable RAN virtualization in shared platforms

G Garcia-Aviles, A Garcia-Saavedra… - Proceedings of the 27th …, 2021 - dl.acm.org
RAN virtualization will become a key technology for the last mile of next-generation mobile
networks driven by initiatives such as the O-RAN alliance. However, due to the computing …

VLSI implementation of a multi-mode turbo/LDPC decoder architecture

C Condo, M Martina, G Masera - IEEE Transactions on Circuits …, 2012 - ieeexplore.ieee.org
Flexible and reconfigurable architectures have gained wide popularity in the
communications field. In particular, reconfigurable architectures for the physical layer are an …

High-throughput LDPC-decoder architecture using efficient comparison techniques & dynamic multi-frame processing schedule

S Kumawat, R Shrestha, N Daga… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
This paper presents architecture of block-level-parallel layered decoder for irregular LDPC
code. It can be reconfigured to support various block lengths and code rates of IEEE 802.11 …

ATHENA: Machine Learning and Reasoning for Radio Resources Scheduling in vRAN systems

N Apostolakis, M Gramaglia… - IEEE Journal on …, 2023 - ieeexplore.ieee.org
Next-generation mobile networks will rely on their autonomous operation. Virtual Network
Functions empowered by Artificial Intelligence (AI) and Machine Learning (ML) can adapt to …

A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding

P Murugappa, R Al-Khayat, A Baghdadi… - … , Automation & Test …, 2011 - ieeexplore.ieee.org
In order to address the large variety of channel coding options specified in existing and
future digital communication standards, there is an increasing need for flexible solutions …

A network-on-chip-based turbo/LDPC decoder architecture

C Condo, M Martina, G Masera - 2012 Design, Automation & …, 2012 - ieeexplore.ieee.org
The current convergence process in wireless technologies demands for strong efforts in the
conceiving of highly flexible and interoperable equipments. This contribution focuses on one …

A processor based multi-standard low-power LDPC engine for multi-Gbps wireless communication

M Li, F Naessens, M Li, P Debacker… - 2013 IEEE Global …, 2013 - ieeexplore.ieee.org
The design of multi-Gbps LDPC decoder has become a hot topic in recent years as the
demand of the transformation towards 4G. In this paper, we describe an energy efficient …

Flexible channel decoder

G Gentile, M Rovini, P Burzigotti, L Fanucci - US Patent 8,879,670, 2014 - Google Patents
A configurable Turbo-LDPC decoder having A set of P> 1 Soft-Input-Soft-Output decoding
units (DP 0-DP P-1; DP i) for iteratively decoding both Turbo-and LDPC-encoded input data …

Unified turbo/LDPC code decoder architecture for deep-space communications

C Condo, G Masera - IEEE Transactions on Aerospace and …, 2014 - ieeexplore.ieee.org
Deep-space communications are characterized by extremely critical conditions; current
standards foresee the usage of both turbo and low-density-parity-check (LDPC) codes to …

Accelerating the performance of stochastic encoding-based computations by sharing bits in consecutive bit streams

P Li, DJ Lilja - 2013 IEEE 24th International Conference on …, 2013 - ieeexplore.ieee.org
Stochastic encoding represents a value using the probability of ones in a random bit stream.
Computation based on this encoding has good fault-tolerance and low hardware cost …