Application mapping is one of the most important dimensions in Network-on-Chip (NoC)
research. It maps the cores of the application to the routers of the NoC topology, affecting the …

The growing complexity of customizable single-chip multiprocessors is requiring
communication resources that can only be provided by a highly-scalable communication …

This book targets engineers and researchers familiar with basic computer architecture
concepts who are interested in learning about on-chip networks. This work is designed to be …

We are witnessing a growing interest in Networks on Chips (NoC) that is related to the
evolution of integrated circuit technology and to the growing requirements in performance …

Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex
on-chip communication problems. The lack of an unified representation of applications and …

Application-specific system-on-chip (SoC) design offers the opportunity for incorporating
custom network-on-chip (NoC) architectures that are more suitable for a particular …

This book targets engineers and researchers familiar with basic computer architecture
concepts who are interested in learning about on-chip networks. This work is designed to be …

Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-
to-predict system scenarios occur. This drives the development of run-time adaptive …

In this paper, a novel system-level buffer planning algorithm that can be used to customize
the router design in networks-on-chip (NoCs) is presented. More precisely, given the traffic …

With increasing communication demands of processor and memory cores in Systems on
Chips (SoCs), scalable Networks on Chips (NoCs) are needed to interconnect the cores. For …