High-Speed Polynomial Basis Multipliers Over for Special Pentanomials
JL Imaña - IEEE Transactions on Circuits and Systems I …, 2015 - ieeexplore.ieee.org
Efficient hardware implementations of arithmetic operations in the Galois field GF (2 m) are
highly desirable for several applications, such as coding theory, computer algebra and …
highly desirable for several applications, such as coding theory, computer algebra and …
Low-Complexity Hardware Architecture of APN Permutations Using TU-Decomposition
L Budaghyan, JL Imaña… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Functions with good cryptographic properties which are used as S-boxes in the design of
block ciphers have a fundamental importance to the security of these ciphers since they …
block ciphers have a fundamental importance to the security of these ciphers since they …
[HTML][HTML] Hardware architecture of Dillon's APN permutation for different primitive polynomials
Cryptographically strong functions used as S-boxes in block cyphers are fundamental for the
cypher's security. Their representation as lookup tables is possible for functions of small …
cypher's security. Their representation as lookup tables is possible for functions of small …
Decomposition of dillon's APN permutation with efficient hardware implementation
Modern block ciphers incorporate a vectorial Boolean function (S-box) as their only
nonlinear component. Almost Perfect Nonlinear (APN) functions exhibit optimal resistance to …
nonlinear component. Almost Perfect Nonlinear (APN) functions exhibit optimal resistance to …
Fast hybrid Karatsuba multiplier for type II pentanomials
Y Li, Y Zhang, W He - IEEE Transactions on Very Large Scale …, 2020 - ieeexplore.ieee.org
We continue the study of Mastrovito form of Karatsuba (MK) multipliers under the shifted
polynomial basis (SPB). An MK multiplier utilizes Karatsuba algorithm and Mastrovito …
polynomial basis (SPB). An MK multiplier utilizes Karatsuba algorithm and Mastrovito …
An Efficient CRT-based Bit-parallel Multiplier for Special Pentanomials
Y Li, X Cui, Y Zhang - IEEE Transactions on Computers, 2021 - ieeexplore.ieee.org
The Chinese remainder theorem (CRT)-based multiplier is a new type of hybrid bit-parallel
multiplier, which can achieve nearly the same time complexity compared with the fastest …
multiplier, which can achieve nearly the same time complexity compared with the fastest …
Optimized reversible quantum circuits for multiplication
JL Imaña - Quantum Information Processing, 2021 - Springer
Quantum computers represent a serious threat to the safety of modern encryption standards.
Within symmetric cryptography, Advanced Encryption Standard (AES) is believed to be …
Within symmetric cryptography, Advanced Encryption Standard (AES) is believed to be …
[HTML][HTML] Domain-oriented masked bit-parallel finite-field multiplier against side-channel attacks
JL Imaña, S Dhooghe - Information Processing Letters, 2023 - Elsevier
Abstract Side-Channel Analysis (SCA) constitutes a serious threat to the security of
implemented cryptosystems. In SCA, the attacker can obtain information leakage from a …
implemented cryptosystems. In SCA, the attacker can obtain information leakage from a …
Reconfigurable implementation of GF(2m) bit-parallel multipliers
JL Imaña - 2018 Design, Automation & Test in Europe …, 2018 - ieeexplore.ieee.org
Hardware implementations of arithmetic operations over binary finite fields GF (2 m) are
widely used in several important applications, such as cryptography, digital signal …
widely used in several important applications, such as cryptography, digital signal …
Hardware architecture of Dillon's APN permutation for different primitive polynomials
JL Imaña Pascual, N Kaleyski, L Budaghyan - 2023 - docta.ucm.es
Cryptographically strong functions used as S-boxes in block cyphers are fundamental for the
cypher's security. Their representation as lookup tables is possible for functions of small …
cypher's security. Their representation as lookup tables is possible for functions of small …