[HTML][HTML] An improvement of both security and reliability for AES implementations

M Bedoui, H Mestiri, B Bouallegue, B Hamdi… - Journal of King Saud …, 2022 - Elsevier
Cryptographic circuits, because they contain confidential information, are subject to
fraudulent manipulations, commonly called attacks, by ill-intentioned people. Several attacks …

A new fragile image-in-audio watermarking scheme for tamper detection

R Sripradha, K Deepa - 2020 3rd International Conference on …, 2020 - ieeexplore.ieee.org
Watermarking, steganography and cryptography are used extensively to protect data that is
being transmitted through the internet. Watermarking in particular is used to protect the …

Local clock glitching fault injection with application to the ASCON cipher

G Surya, P Maistri, S Sankaran - 2020 IEEE International …, 2020 - ieeexplore.ieee.org
Lightweight ciphers such as ASCON facilitate ease of implementation as well as provide
better performance over conventional ciphers, thus making it suitable for resource …

On-the-fly key generation based VLSI implementation of advanced encryption standard

S Valasa, S Avunoori, JR Shinde - 2021 6th International …, 2021 - ieeexplore.ieee.org
Data transmitted in a digital format is vulnerable to breaches. Here, the FPGA-based
Advanced Encryption Standard (AES) architecture is proposed to safeguard high speed …

Encryption and Decryption of messages using QR Decomposition

AA Kumar, KN Meera, S Broumi - 2024 4th International …, 2024 - ieeexplore.ieee.org
Ensuring data security within information systems has emerged as a pivotal concern.
Maintaining data confidentiality during transmission via third-party entities stands as a …

FPGA Implementation of Cryptography Using Reversible Logic Gates for Images

VS Aparna, A Chalil - … 3rd Asian Conference on Innovation in …, 2023 - ieeexplore.ieee.org
In VLSI, heat dissipation is of major concern, which can be reduced by using reversible logic
gates in the implementation of the designs. Reversible computations have a broad range of …

DMR-based technique for fault tolerant AES S-box architecture

M Taheri, S Sheikhpour, MS Ansari… - arXiv preprint arXiv …, 2020 - arxiv.org
This paper presents a high-throughput fault-resilient hardware implementation of AES S-
box, called HFS-box. If a transient natural or even malicious fault in each pipeline stage is …

A Data System Model with the Viterbi Algorithm for soft decision output

S Murugan, MJVA Sai, P Nandeeshwar… - … Conference on Smart …, 2019 - ieeexplore.ieee.org
The world of digital living is ever-expanding. There is a constant demand for newer
technologies and effectual communication systems in various fields. This has led to various …

[PDF][PDF] Computer and Information Sciences

M Bedoui, H Mestiri, B Bouallegue… - Journal of King Saud …, 2022 - researchgate.net
abstract Cryptographic circuits, because they contain confidential information, are subject to
fraudulent manipulations, commonly called attacks, by ill-intentioned people. Several attacks …

An Efficient AES with Custom Configurable Encryption Algorithm Using Dynamic Keys for Secure Data Communication in Networks

PP Kalyan, S Bano, YL Pranthi, V Lokesh - International Conference on …, 2021 - Springer
In this digital era, people are moving fast towards cloud and big data; hence, it becomes very
important for the organization to encrypt the data. To enable secure data communication, the …