In this paper we present partitioning for simultaneous cut size and circuit delay minimization.
Due to the random search, of simulated annealing algorithms, the solution of a circuit …

The efficiency of various stages of physical design in the Very Large Scale Integration (VLSI)
circuit can be enhanced by using multi-objective optimization techniques. The circuit is …

Area miniaturization is the essence of compaction of any application circuit in chip
designing. The physical design stages involve virtual design realizations iterated for their …

An FPGA ('Field Programmable Gate Array') is an integrated circuit comprising a large
number of programmable and interconnectable logic resources, which allow one to …

Minimizing the power consumption of electronic systems is one of the most critical concerns
in the design of integrated circuits for very large-scale integration (VLSI). Despite the reality …

The three dimensional integration of electronic circuits (3D-ICs) is one of the most promising
approaches to encounter eternally increasing demands of functionality, performance, and …

Circuit partitioning problem is a well known NP hard problem. The potential of Genetic
Algorithm has been used to solve many computationally intensive problems (NP hard …

Very large scale integration (VLSI) design and automation is one of the most important fields
from decades. But still now VLSI physical design has high demand. Efficient methods are …

Power gating (PG) is used to reduce leakage power by shutting down the power supply of
the inactive block of the circuit. PG technique for finite state machine (FSM) is used to reduce …

This paper addresses the issues associated with the physical design of a very large-scale
integration (VLSI). A major challenge to the physical design of a VLSI is to reduce the …