High-efficient, ultra-low-power and high-speed 4: 2 compressor with a new full adder cell for bioelectronics applications

A Sadeghi, N Shiri, M Rafiee - Circuits, Systems, and Signal Processing, 2020 - Springer
Size reduction in complementary metal–oxide–semiconductor integrated circuits (ICs) is a
challenge. Carbon nanotube field effect transistor (CNTFET) technology with advantages …

An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications

M Rafiee, F Pesaran, A Sadeghi, N Shiri - Microelectronics Journal, 2021 - Elsevier
Different digital multipliers have resulted from various algorithms and hardware designs.
This article presents a high-performance multiplier by a novel AND gate and a modified …

Tolerant and low power subtractor with 4: 2 compressor and a new TG‐PTL‐float full adder cell

A Sadeghi, N Shiri, M Rafiee… - IET Circuits, Devices & …, 2022 - Wiley Online Library
A new 1‐bit full adder (FA) cell illustrating low‐power, high‐speed, and a small area is
presented by a combination of transmission gate (TG), pass transistor logic (PTL), and float …

SR‐GDI CNTFET‐based magnitude comparator for new generation of programmable integrated circuits

N Shiri, A Sadeghi, M Rafiee… - International Journal of …, 2022 - Wiley Online Library
The performance of the programmable integrated circuits (ICs) like digital signal processors
(DSPs), central processing units (CPUs), and microcontrollers is highly dependent on the …

High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures

N Shiri, A Sadeghi, M Rafiee - Computers and Electrical Engineering, 2023 - Elsevier
Two new approximate full adders (FAs) are proposed by the multiplexers (MUXs) and OR
gates with the gate diffusion input (GDI) technique. The cells are named GDI-based MUX …

A high‐efficient imprecise discrete cosine transform block based on a novel full adder and Wallace multiplier for bioimages compression

E Esmaeili, F Pesaran, N Shiri - International Journal of Circuit …, 2023 - Wiley Online Library
Sophisticated systems take advantage of approximate circuits for energy management. A
gate‐level structure is introduced to make a novel imprecise full adder (FA) cell by the gate …

Newly energy-efficient SRAM bit-cell using GAA CNT-GDI method with asymmetrical write and built-in read-assist schemes for QR code-based multimedia …

A Darabi, MR Salehi, E Abiri - Microelectronics Journal, 2021 - Elsevier
The novel design of asymmetric single-ended ten-transistor SRAM bit-cell (SE 10T-SRAM)
using gate-all-around (GAA) carbon nanotube (CNT) FETs-based GAA CNT-GDI method …

HF-QSRAM: half-select free quaternary SRAM design with required peripheral circuits for IoT/IoVT applications

A Ghasemian, E Abiri, K Hassanli… - ECS Journal of Solid …, 2022 - iopscience.iop.org
By using CNFET technology in 32 nm node by the proposed SQI gate, two split bit-lines
QSRAM architectures have been suggested to address the issue of increasing demand for …

Voltage over‐scaling CNT‐based 8‐bit multiplier by high‐efficient GDI‐based counters

A Sadeghi, N Shiri, M Rafiee… - IET Computers & …, 2023 - Wiley Online Library
A new low‐power and high‐speed multiplier is presented based on the voltage over scaling
(VOS) technique and new 5: 3 and 7: 3 counter cells. The VOS reduces power consumption …

An Intelligent Fault Diagnosis Method for Transformer Based on IPSO‐gcForest

K Liu, S Wu, Z Luo, Z Gongze, X Ma… - Mathematical …, 2021 - Wiley Online Library
Transformers are the main equipment for power system operation. Undiagnosed faults in the
internal components of the transformer will increase the downtime during operation and …