A 0.3 V 10b 3MS/s SAR ADC with comparator calibration and kickback noise reduction for biomedical applications

SH Wang, CC Hung - IEEE transactions on biomedical circuits …, 2020 - ieeexplore.ieee.org
This paper presents a 10-bit successive approximation analog-to-digital converter (ADC)
that operates at an ultralow voltage of 0.3 V and can be applied to biomedical implants. The …

A low power 12-bit 1-kS/s SAR ADC for biomedical signal processing

W Mao, Y Li, CH Heng, Y Lian - IEEE Transactions on Circuits …, 2018 - ieeexplore.ieee.org
In this paper, a 12-bit 1-kS/s successive approximation register analog-to-digital converter
(ADC) is presented for biomedical signal processing system. A multi-segmentation digital-to …

An 11-bit 250-nW 10-kS/s SAR ADC with doubled input range for biomedical applications

M Sadollahi, K Hamashita, K Sobue… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
This paper presents a low-power, area-efficient 11-b single-ended successive-
approximation-register (SAR) analog-todigital converter (ADC) targeted for biomedical …

Fully dynamic zoom-ADC based on improved swing-enhanced FIAs using CLS technique with 1250× bandwidth/power scalability

Y Zhao, M Zhao, Z Tan - … on Circuits and Systems II: Express …, 2023 - ieeexplore.ieee.org
This brief proposes a fully dynamic zoom ADC based on improved swing-enhanced floating-
inverter amplifiers (SEFIAs) using the correlated-level-shifting (CLS) technique with …

A 1.4-mW 10-bit 150-MS/s SAR ADC with nonbinary split capacitive DAC in 65-nm CMOS

D Li, Z Zhu, R Ding, Y Yang - IEEE Transactions on Circuits and …, 2017 - ieeexplore.ieee.org
This brief presents a high-speed successive approximation register analog-to-digital
converter (ADC) with nonbinary searching technique. By inserting redundancy in the first five …

A 0.2-V 1.2 nW 1-KS/s SAR ADC with a novel comparator structure for biomedical applications

M Vafaei, MR Hosseini, E Abiri, MR Salehi - Integration, 2023 - Elsevier
In this paper, a modified successive-approximation-register analog-to-digital converter (SAR
ADC) with a novel low power dynamic comparator at 0.2 V supply voltage is presented. The …

Energy-efficient DAC switching technique for single-ended SAR ADCs

B Jajodia, A Mahanta, SR Ahamed - AEU-International Journal of …, 2020 - Elsevier
A novel energy-efficient digital-to-analog converter (DAC) switching technique applicable to
single-ended successive approximation register (SAR) analog-to-digital converter (ADC) is …

A 7.1-fJ/conversion-step 88-dB SFDR SAR ADC with energy-free “swap to reset”

M Liu, AHM van Roermund… - IEEE Journal of Solid …, 2017 - ieeexplore.ieee.org
The digital-to-analog converter (DAC) in SAR anolog-to-digital converters (ADCs) is often
dominant for both power consumption and linearity. Dedicated switching schemes can save …

Passive noise shaping in SAR ADC with improved efficiency

Y Song, CH Chan, Y Zhu, L Geng… - … Transactions on Very …, 2017 - ieeexplore.ieee.org
This brief reports a passive noise-shaping (PNS) scheme for successive approximation
register (SAR) analog-to-digital converter (ADC) based on the two-step integration with …

A 1-V 560-nW SAR ADC With 90-dB SNDR for IoT Sensing Applications

H Zhang, Z Tan, C Chu, B Chen, H Li… - … on Circuits and …, 2019 - ieeexplore.ieee.org
This brief presents a sub-microwatt oversampling successive approximation register (SAR)
analog-to-digital converter (ADC) dedicated to Internet of Things sensing applications …