Performing memory built-in-self-test (MBIST)
N Mukherjee, X Du, WT Cheng - US Patent 7,426,668, 2008 - Google Patents
2021-06-29 Assigned to SIEMENS INDUSTRY SOFTWARE INC. reassignment SIEMENS
INDUSTRY SOFTWARE INC. MERGER AND CHANGE OF NAME (SEE DOCUMENT FOR …
INDUSTRY SOFTWARE INC. MERGER AND CHANGE OF NAME (SEE DOCUMENT FOR …
Programmable memory built-in-self-test (MBIST) method and apparatus
N Mukherjee, X Du, WT Cheng - US Patent 7,428,680, 2008 - Google Patents
US7428680B2 - Programmable memory built-in-self-test (MBIST) method and apparatus -
Google Patents US7428680B2 - Programmable memory built-in-self-test (MBIST) method and …
Google Patents US7428680B2 - Programmable memory built-in-self-test (MBIST) method and …
Flexible memory built-in-self-test (MBIST) method and apparatus
N Mukherjee, X Du, WT Cheng - US Patent 7,434,131, 2008 - Google Patents
US7434131B2 - Flexible memory built-in-self-test (MBIST) method and apparatus - Google
Patents US7434131B2 - Flexible memory built-in-self-test (MBIST) method and apparatus …
Patents US7434131B2 - Flexible memory built-in-self-test (MBIST) method and apparatus …
Testing memories using algorithm selection
N Mukherjee, JC Rayhawk, A Kumar - US Patent 7,533,309, 2009 - Google Patents
(57) ABSTRACT A method of performing a built-in-self-test (BIST) of at least one memory
element of a circuit is disclosed. In a specific example, a determination is made during …
element of a circuit is disclosed. In a specific example, a determination is made during …
Programmable test for memories
M Nicolaidis, S Boutobza - US Patent 7,093,176, 2006 - Google Patents
(57) ABSTRACT A programmable built in self test, BIST, system for testing a memory,
comprises an instruction register formed in the same chip as the memory; a circuit for …
comprises an instruction register formed in the same chip as the memory; a circuit for …
Configurable built in self test circuitry for testing memory arrays
B Natarajan, JG Dastidar, MN Zakaria - US Patent 7,475,315, 2009 - Google Patents
CONTROL REGISTER control settings to the test control register circuitry. The test control
settings may include march element settings for a march sequence. During testing, the …
settings may include march element settings for a march sequence. During testing, the …
System, apparatus, and method for memory built-in self testing using microcode sequencers
DR Resnick - US Patent 7,721,175, 2010 - Google Patents
BACKGROUND The number of semiconductor memory devices and stor age capacity for
those memory devices continues to grow, making testing of the memory chips more complex …
those memory devices continues to grow, making testing of the memory chips more complex …
Programmable memory built-in self-test circuit and clock switching circuit thereof
YJ Chang, CF Lin - US Patent 7,716,542, 2010 - Google Patents
(57) ABSTRACT A programmable memory built-in self-test circuit and a clock switching
circuit thereof are provided. The memory built-in self-test circuit is able to provide more self …
circuit thereof are provided. The memory built-in self-test circuit is able to provide more self …
Data controlling in the MBIST chain architecture
A Andreev, A Bolotov, M Grinchuk - US Patent 8,156,391, 2012 - Google Patents
A memory collar including a first circuit and a second circuit. The first circuit may be
configured to generate one or more data sequences in response to one or more test …
configured to generate one or more data sequences in response to one or more test …
Address controlling in the MBIST chain architecture
A Andreev, A Bolotov, M Grinchuk - US Patent 7,949,909, 2011 - Google Patents
A memory collar includes a first circuit, a second circuit and a third circuit. The first circuit
may be configured to generate a first control signal, a second control signal and a third …
may be configured to generate a first control signal, a second control signal and a third …