Design for Embedded Image Processing on FPGAs Bridge the gap between software and
hardware with this foundational design reference Field-programmable gate arrays (FPGAs) …

Today's vehicles are advancing from stand-alone transportation means to vehicle-to-vehicle,
and vehicle-to-infrastructure communications enabled devices which are able to exchange …

In this paper, we propose a high-performance and memory-efficient pipeline architecture
which performs the one-level two-dimensional (2-D) discrete wavelet transform (DWT) in the …

In this paper, we review recent developments in VLSI architectures and algorithms for
efficient implementation of lifting based Discrete Wavelet Transform (DWT). The basic …

This paper describes an area and power-efficient VLSI approach for implementing the
discrete wavelet transform on streaming multielectrode neurophysiological data in real time …

This paper presents a systematic high-speed VLSI implementation of the discrete wavelet
transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D …

A high-speed and reduced-area 2-D discrete wavelet transform (2-D DWT) architecture is
proposed. Previous DWT architectures are mostly based on the modified lifting scheme or …

In this brief an efficient folded architecture (EFA) for lifting-based discrete wavelet transform
(DWT) is presented. The proposed EFA is based on a novel form of the lifting scheme that is …

Novel architectures for 1-D and 2-D discrete wavelet transform (DWT) by using lifting
schemes are presented in this paper. An embedded decimation technique is exploited to …

In this paper, we present a high performance and memory-efficient pipelined architecture
with parallel scanning method for 2-D lifting-based DWT in JPEG2000 applications. The …