Test strategies for reliable runtime reconfigurable architectures

L Bauer, C Braun, ME Imhof, MA Kochte… - IEEE Transactions …, 2013 - ieeexplore.ieee.org
Field-programmable gate array (FPGA)-based reconfigurable systems allow the online
adaptation to dynamically changing runtime requirements. The reliability of FPGAs, being …

A memristor-based LUT for FPGAs

HAF Almurib, TN Kumar… - The 9th IEEE International …, 2014 - ieeexplore.ieee.org
This paper presents a memristor-based Look-Up Table (LUT) for FPGAs. The proposed
memory utilizes memristors as storage elements and NMOS transistors for selection. New …

Low energy non-volatile look-up table using 2 bit ReRAM for field programmable gate array

HL Chee, TN Kumar, HAF Almurib - Semiconductor Science and …, 2022 - iopscience.iop.org
A low energy non-volatile look-up table (NV-LUT) consisting of 2 bit resistive random-access
memories (2 bit ReRAMs) for field-programmable gate arrays (FPGAs) is investigated in this …

Scalable application-dependent diagnosisof interconnects of SRAM-based FPGAs

HAF Almurib, TN Kumar… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
This paper presents a new method for diagnosing (detection and location) multiple faults in
an application-dependent interconnect of a SRAM-based FPGA. For fault detection, the …

A ReRAM-based nonvolatile FPGA

HL Chee, TN Kumar… - 2022 IEEE 20th Student …, 2022 - ieeexplore.ieee.org
Modern challenges in electronics engineering include the need for massive scale
computation devices that are energy-efficient. Conventional digital memory devices such as …

Review of Side Channel Attacks and Countermeasures of FPGA Based Systems

JY Koh, TN Kumar - 2021 IEEE 19th Student Conference on …, 2021 - ieeexplore.ieee.org
Field Programmable Gate Arrays (FPGAs) based systems are widely used in a range of
applications including cryptography and machine learning model due to the rapid rate of …

On the operational features and performance of a memristor-based cell for a LUT of an FPGA

TN Kumar, HAF Almurib… - 2013 13th IEEE …, 2013 - ieeexplore.ieee.org
This paper presents the detailed analysis of a memristor-based cell for a Look-Up Table
(LUT) of a FPGA. The basic operational properties of this memristor-based cell are …

Single‐configuration fault detection in application‐dependent testing of field programmable gate array interconnects

T Nandha Kumar, HAF Almurib… - IET Computers & Digital …, 2013 - Wiley Online Library
This study presents a new method for application testing of field programmable gate array
(FPGA) interconnects at run time. This method utilises new features related to the function for …

FPGA Based Real Time Back Posture Correction Device

S Verma, NK Thulasiraman… - 2021 IEEE 19th Student …, 2021 - ieeexplore.ieee.org
It is a well agreed upon subject that bad posture leads to serious health complications from
toddlers to elderly. This bad posture can be a result of a serious injury, an aftermath of a …

Application dependent FPGA interconnect test method with small test configuration number using SMT net-grouping constraints

X He, J Lai - IEICE Electronics Express, 2024 - jstage.jst.go.jp
An application dependent FPGA interconnect testing scheme is presented. The goal is to
reduce the number of test configurations while keeping high fault coverage. Reduction is …