Wetting of regularly structured gold surfaces

ME Abdelsalam, PN Bartlett, T Kelf, J Baumberg - Langmuir, 2005 - ACS Publications
In this study we report results for a systematic study of the wetting of structured gold surfaces
formed by electrodeposition through monolayer templates of close-packed uniform …

Interface state energy distribution and Pb defects at Si (110)/SiO2 interfaces: Comparison to (111) and (100) silicon orientations

NH Thoan, K Keunen, VV Afanas'ev… - Journal of Applied …, 2011 - pubs.aip.org
Traps at the (110) Si/SiO 2 interface are investigated by combining electrical methods with
electron spin resonance (ESR) measurements, and the results are compared to the well …

Vertical FETs with variable bottom spacer recess

HV Mallela, RA Vega, R Venigalla - US Patent 9,437,503, 2016 - Google Patents
BACKGROUND The present invention relates to complementary metal oxide semiconductor
(CMOS), and more specifically, to vertical transistors. CMOS is used for constructing …

Vertical transistor with uniform bottom spacer formed by selective oxidation

K Cheng, NJ Loubet, X Miao, A Reznicek - US Patent 9,741,626, 2017 - Google Patents
A method of forming a vertical transistor includes forming at least one fin on stacked layers.
The stacked layers include a substrate, a doped silicon layer, and an intrinsic layer …

Surface sediment bulk geochemistry and grain-size composition related to the oceanic circulation along the South American continental margin in the Southwest …

M Frenz, R Höppner, JBW Stuut, T Wagner… - The South Atlantic in the …, 2004 - Springer
Surface sediments from the South American continental margin surrounding the Argentine
Basin were studied with respect to bulk geochemistry (CaCO 3 and C org) and grain-size …

Embedded metal oxide plasmonics using local plasma oxidation of AZO for planar metasurfaces

K Sun, W Xiao, S Ye, N Kalfagiannis… - Advanced …, 2020 - Wiley Online Library
New methods for achieving high‐quality conducting oxide metasurfaces are of great
importance for a range of emerging applications from infrared thermal control coatings to …

Bottom spacer formation for vertical transistor

O Gluschenkov, SC Mehta, S Mochizuki… - US Patent …, 2017 - Google Patents
(57) ABSTRACT A bilayer of silicon dioxide and silicon nitride is formed on exposed
surfaces of at least one semiconductor fin having a bottom source/drain region located at the …

Recent terrestrial and carbonate fluxes in the pelagic eastern Mediterranean; a comparison between sediment trap and surface sediment

A Rutten, GJ De Lange, P Ziveri, J Thomson… - Palaeogeography …, 2000 - Elsevier
A sediment trap mooring was deployed in the central eastern Mediterranean from November
1991 to August 1994. At 3000m water depth, total mass, Al, Ca, Mg, Sr and 230Th fluxes …

Single, double and surround gate vertical MOSFETs with reduced parasitic capacitance

E Gili, VD Kunz, CH De Groot, T Uchino, P Ashburn… - Solid-State …, 2004 - Elsevier
The vertical MOSFET structure is one of the solutions for reducing the channel length of
transistors under 50 nm. Surround gates can be easily realised in vertical MOSFETs which …

Fatigue characterization of a polymer foam to use as a cancellous bone analog material in the assessment of orthopaedic devices

V Palissery, M Taylor, M Browne - Journal of Materials Science: Materials …, 2004 - Springer
Analog materials are used as a substitute to cancellous bone for in vitro biomechanical tests
due to their uniformity, consistency in properties and availability. To date, only the static …