CJM: a compact model for double-gate junction FETs

N Makris, M Bucher, F Jazaeri… - IEEE Journal of the …, 2019 - ieeexplore.ieee.org
The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device,
with a simple structure that presents many advantages in terms of device fabrication but also …

Experimental study on short-channel effects in double-gate silicon carbide JFETs

M Kaneko, M Nakajima, Q Jin… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Short-channel effects (SCEs) in double-gate silicon carbide junction field-effect transistors
(JFETs) fully fabricated by ion implantation are experimentally investigated. The threshold …

Charge-based modeling of long-channel symmetric double-gate junction FETs—Part I: Drain current and transconductances

N Makris, F Jazaeri, JM Sallese… - … on Electron Devices, 2018 - ieeexplore.ieee.org
The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device,
with a simple structure that presents many advantages in terms of not only device fabrication …

A compact model for static and dynamic operation of symmetric double-gate junction FETs

N Makris, M Bucher, F Jazaeri… - 2018 48th European …, 2018 - ieeexplore.ieee.org
The present work describes a novel charge-based compact model of the symmetric double-
gate junction field effect transistor (DG JFET) for circuit simulation. The model is physics …

JFETIDG: A compact model for independent dual-gate JFETs with junction or MOS gates

K Xia, CC McAndrew - IEEE Transactions on Electron Devices, 2018 - ieeexplore.ieee.org
This paper presents the details of JFETIDG, a compact model for independent dual-gate
junction field-effect transistors with any combination of pn junction or MOS gates. JFETIDG …

Compact/SPICE Modeling

W Grabinski, D Tomaszewski - Springer Handbook of Semiconductor …, 2022 - Springer
The microelectronics and nano-electronics industry strongly relies on compact models to
reduce a new microelectronic product development costs. The goals of this review are to …

Dual-gate JFET modeling I: Generalization to include MOS gates and efficient method to calculate drain–source saturation voltage

K Xia, CC McAndrew, B Grote - IEEE Transactions on Electron …, 2016 - ieeexplore.ieee.org
This paper presents an accurate and computationally efficient method to calculate the drain-
source saturation voltage V dsat of dual-gate (ie, four-terminal) junction field-effect …

JFETIDG: A compact model for independent dual-gate JFETs

K Xia, CC McAndrew, H Sheng - 2017 IEEE Electron Devices …, 2017 - ieeexplore.ieee.org
This paper presents a new compact model, JFETIDG, for independent dual-gate JFETs. The
model is applicable to JFETs with any combination of pn junction or MOS gates, captures …

DC and transient models of the MSET device

A Peled, O Amrani, Y Rosenwaks - International Journal of …, 2021 - Wiley Online Library
As a multigate device, the multiple‐state electrostatically formed nanowire transistor (MSET)
exhibits a rather complex characteristic on account of the coupling between each of its two …

[PDF][PDF] CJM: A Compact Model for Double-Gate Junction FETs

JM SALLESE - academia.edu
The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device,
with a simple structure that presents many advantages in terms of device fabrication but also …