DIMM-based near-memory processing architectures (DIMM-NMP) have received growing
interest from both academia and industry. They have the advantages of large memory …

Rapid ON/OFF (ROO) operation helps scale power in accordance with link utilization. In this
article, we present a baud-rate ROO receiver that can turn on in just 10 ns (~ 120 TiI). Baud …

This article presents a 20-Gb/s/pin 0.0024-mm2 single-ended data-embedded clock
signaling (DECS) transceiver (TRX) for short-reach on-chip links. The receiver (RX) directly …

This article presents the body channel communication technique that first adopts decision
feedback equalisation. For the first time, we characterised post-cursor intersymbol …

For the first time, we prove that 7.8-Gb/s single-ended signaling through a highly reflective
channel is feasible at low energy cost by an energy-efficient many-tap decision feedback …

In massively parallel short-reach (SR) interfaces [2]–[5], thousands of I/Os communicate
through many low-loss parallel interconnects (Fig. 28.7. 1). Due to the large number of I/Os …

A bidirectional link geared toward mobile I/O applications is presented that leverages the
technological advantages of CMOS scaling to improve energy efficiency. Active power …

We propose a reflection self-canceling design technique for multidrop memory interfaces. In
this technique, lengths of branch lines are designed, so that dominant multiple reflections …

This paper presents a phase-difference-modulation transceiver with simple clock recovery
for highly-reflective interconnects. By greatly suppressing reflective intersymbol …

In this letter, we present a rapid on/off 0.63–7.5-Gb/s digital clock and data recovery with a
low-turn-on time and recovered clock jitter. The clock and data recovery (CDR) employs a …