Software-defined Radios: Architecture, state-of-the-art, and challenges
R Akeela, B Dezfouli - Computer Communications, 2018 - Elsevier
Software-defined Radio (SDR) is a programmable transceiver with the capability of
operating various wireless communication protocols without the need to change or update …
operating various wireless communication protocols without the need to change or update …
Organized flight in birds
IL Bajec, FH Heppner - Animal Behaviour, 2009 - Elsevier
The organized flight of birds is one of the most easily observed, yet challenging to study,
phenomena in biology. Birds that fly in organized groups generally do so in one of two …
phenomena in biology. Birds that fly in organized groups generally do so in one of two …
Optimization of sparse matrix-vector multiplication on emerging multicore platforms
We are witnessing a dramatic change in computer architecture due to the multicore
paradigm shift, as every electronic device from cell phones to supercomputers confronts …
paradigm shift, as every electronic device from cell phones to supercomputers confronts …
[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …
between the separate worlds of hardware and software design—the key feature of …
A survey of multicore processors
G Blake, RG Dreslinski, T Mudge - IEEE Signal Processing …, 2009 - ieeexplore.ieee.org
General-purpose multicore processors are being accepted in all segments of the industry,
including signal processing and embedded space, as the need for more performance and …
including signal processing and embedded space, as the need for more performance and …
From NWChem to NWChemEx: Evolving with the computational chemistry landscape
Since the advent of the first computers, chemists have been at the forefront of using
computers to understand and solve complex chemical problems. As the hardware and …
computers to understand and solve complex chemical problems. As the hardware and …
On using lossless compression of debug data in embedded logic analysis
E Anis, N Nicolici - 2007 IEEE International Test Conference, 2007 - ieeexplore.ieee.org
The capacity of on-chip trace buffers employed for embedded logic analysis limits the
observation window of a debug experiment. To increase the debug observation window, we …
observation window of a debug experiment. To increase the debug observation window, we …
[HTML][HTML] pocl: A performance-portable OpenCL implementation
P Jääskeläinen, CS de La Lama, E Schnetter… - International Journal of …, 2015 - Springer
OpenCL is a standard for parallel programming of heterogeneous systems. The benefits of a
common programming standard are clear; multiple vendors can provide support for …
common programming standard are clear; multiple vendors can provide support for …
Cell broadband engine architecture and its first implementation—a performance view
T Chen, R Raghavan, JN Dale… - IBM Journal of Research …, 2007 - ieeexplore.ieee.org
The Cell Broadband Engine™(Cell/BE) processor is the first implementation of the Cell
Broadband Engine Architecture (CBEA), developed jointly by Sony, Toshiba, and IBM. In …
Broadband Engine Architecture (CBEA), developed jointly by Sony, Toshiba, and IBM. In …
Entering the petaflop era: the architecture and performance of Roadrunner
Roadrunner is a 1.38 Pflop/s-peak (double precision) hybrid-architecture supercomputer
developed by LANL and IBM. It contains 12,240 IBM PowerXCell 8i processors and 12,240 …
developed by LANL and IBM. It contains 12,240 IBM PowerXCell 8i processors and 12,240 …