Methods and systems are described for receiving N phases of a local clock signal and M
phases of a reference signal, wherein M is an integer greater than or equal to 1 and N is an …

Orthogonal differential vector signaling codes are described which support encoded sub-
channels allowing transport of distinct data and clocking signals over the same transport …

Methods and systems are described for receiving signal elements corresponding to a first
group of symbols of a vector signaling codeword over a first densely-routed wire group of a …

Transmission of baseband and carrier-modulated vector codewords, using a plurality of
encoders, each encoder configured to receive information bits and to generate a set of …

Methods and systems are described for generating, using a voltage-controlled oscillator
(VCO), a plurality of phases of a local clock signal, generating a phase-error signal using a …

Methods and systems described include a first dielectric material having a plurality of
embedded conductors of a multi-wire channel, the plurality of embedded conductors …

Pre-charging two or more sets of nodes to set a differential output of a multi-input summation
latch connected to the two or more sets of nodes in a pre-charged state, the two or more sets …

Multi-mode non-return-to-zero (NRZ) and orthogonal differential vector signaling (ODVS)
clock and data recovery circuits having configurable sub-channel multi-input comparator …

Methods and systems are described for receiving, at an input differential branch pair, a set of
input signals, and responsively generating a first differential current, receiving, at an input of …

Transmission line driver systems are described which are comprised of multiple paralleled
driver elements. The paralleled structure allows efficient generation of multiple output signal …