Adaptive transactional memories: Performance and energy consumption tradeoffs
D Rughetti, P Di Sanzo… - 2014 IEEE 3rd …, 2014 - ieeexplore.ieee.org
Energy efficiency is becoming a pressing issue, especially in large data centers where it
entails, at the same time, a non-negligible management cost, an enhancement of hardware …
entails, at the same time, a non-negligible management cost, an enhancement of hardware …
Transactional encoding for tolerating transient hardware errors
JT Wamhoff, M Schwalbe, R Faqeh, C Fetzer… - Stabilization, Safety, and …, 2013 - Springer
The decreasing feature size of integrated circuits leads to less reliable hardware with higher
likelihood for errors. Without adding additional failure detection and masking mechanisms …
likelihood for errors. Without adding additional failure detection and masking mechanisms …
Selective dynamic serialization for reducing energy consumption in hardware transactional memory systems
E Gaona, JR Titos-Gil, J Fernández… - the Journal of …, 2014 - Springer
In the search for new paradigms to simplify multithreaded programming, Transactional
Memory (TM) is currently being advocated as a promising alternative to deadlock-prone lock …
Memory (TM) is currently being advocated as a promising alternative to deadlock-prone lock …
[PDF][PDF] Between All and Nothing–Versatile Aborts in Hardware Transactional Memory
S Diestelhorst, M Nowack… - 10th Workshop on …, 2015 - transact2015.cse.lehigh.edu
Abstract Hardware Transactional Memory (HTM) implementations are becoming available in
commercial, off-the-shelf components. While generally comparable, some implementations …
commercial, off-the-shelf components. While generally comparable, some implementations …
[PDF][PDF] Interaction of Hardware Transactional Memory and Microprocessor Microarchitecture
S Diestelhorst - 2019 - core.ac.uk
Microprocessor developments In their 47 years of existence, microprocessors have
transformed the way we deal with information. Thanks to exponential growth in the number …
transformed the way we deal with information. Thanks to exponential growth in the number …
Fast and efficient commits for Lazy-Lazy hardware transactional memory
E Gaona, JL Abellán, ME Acacio - The Journal of Supercomputing, 2015 - Springer
Transactional memory (TM) is a compelling alternative to simplify multithreaded
programming that traditionally relies on error-prone lock-based synchronization for …
programming that traditionally relies on error-prone lock-based synchronization for …
[PDF][PDF] Exploiting Speculative and Asymmetric Execution on Multicore Architectures
JT Wamhoff - 2015 - core.ac.uk
The design of microprocessors is undergoing radical changes that affect the performance
and reliability of hardware and will have a high impact on software development. Future …
and reliability of hardware and will have a high impact on software development. Future …
[PDF][PDF] Epifanio Gaona, José L. Abellán &
ME Acacio - J Supercomput, 2015 - researchgate.net
Transactional memory (TM) is a compelling alternative to simplify multithreaded
programming that traditionally relies on error-prone lock-based synchronization for …
programming that traditionally relies on error-prone lock-based synchronization for …