[HTML][HTML] Design and implementation of hybrid logic based MAC unit using 45 nm technology

A Laxman, NSS Reddy, BR Naik - e-Prime-Advances in Electrical …, 2023 - Elsevier
Digital signal processing algorithms, at times, necessitate the execution of a substantial
quantity of mathematical operations to speed up and iterate upon a particular data set …

Enhancing cell delay accuracy in post-placed netlists using ensemble tree-based algorithms

Y Attaoui, M Chentouf, ZEAA Ismaili, A El Mourabit - Integration, 2024 - Elsevier
Nowadays, the ASIC design is increasing in complexity, and PPA targets are pushed to the
limit. The lack of physical information at the early design stages hinders precise timing …

Design and Allocation of Multi-bit Flip-flop Cells Amenable to Placement Legalization in Physical Design

Y Shin, T Kim - 2024 IEEE 37th International System-on-Chip …, 2024 - ieeexplore.ieee.org
It has been widely accepted that multi-bit flip-flops (MBFFs) are indispensable cells to
implement low-power chips. Generally, because of their large size, the cell heights amount …

Solving the Trade-off between Power and Delay in High Speed Circuits using Multi Objective PSO

K Bansal, RK Chaurasiya… - … Computing and Smart …, 2023 - ieeexplore.ieee.org
Power optimization in high speed circuits is a critical need in the current core circuit industry.
Among the major components that derive the formula of power, we cannot alter the …