Monolithic 3D Integrated circuits: Recent trends and future prospects
Monolithic 3D integration technology has emerged as an alternative candidate to
conventional transistor scaling. Unlike conventional processes where multiple metal layers …
conventional transistor scaling. Unlike conventional processes where multiple metal layers …
Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective
In the past decade, monolithic three dimensional integrated circuits (M3D-ICs) advance fast
and demonstrate several important breakthroughs in the fabrication process and circuit level …
and demonstrate several important breakthroughs in the fabrication process and circuit level …
Large-scale 3D chips: Challenges and solutions for design automation, testing, and trustworthy integration
Three-dimensional (3D) integration of electronic chips has been advocated by both industry
and academia for many years. It is acknowledged as one of the most promising approaches …
and academia for many years. It is acknowledged as one of the most promising approaches …
Compact-2D: A physical design methodology to build two-tier gate-level 3-D ICs
The recent advancement of wafer bonding and monolithic integration technology offers fine-
grained 3-D interconnections to face-to-face (F2F) and monolithic 3-D (M3D) ICs. In this …
grained 3-D interconnections to face-to-face (F2F) and monolithic 3-D (M3D) ICs. In this …
Compact-2D: A physical design methodology to build commercial-quality face-to-face-bonded 3D ICs
The recent advancement of wafer bonding technology offers fine-grained and silicon-space
overhead-free 3D interconnections in face-to-face (F2F) bonded 3D ICs. In this paper, we …
overhead-free 3D interconnections in face-to-face (F2F) bonded 3D ICs. In this paper, we …
Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions
K Chang, A Koneru, K Chakrabarty… - 2017 IEEE/ACM …, 2017 - ieeexplore.ieee.org
Monolithic 3D ICs (M3D) are fabricated using a sequential process that grows new device
and interconnect tiers in a bottom-up fashion. This fabrication process is in contrast to …
and interconnect tiers in a bottom-up fashion. This fabrication process is in contrast to …
McPAT-monolithic: An area/power/timing architecture modeling framework for 3-D hybrid monolithic multicore systems
Three-dimensional integrated circuits (3-D ICs) have the potential to push Moore's law
further by accommodating more transistors per unit footprint area along with a reduction in …
further by accommodating more transistors per unit footprint area along with a reduction in …
A modern approach to IP protection and trojan prevention: Split manufacturing for 3D ICs and obfuscation of vertical interconnects
S Patnaik, M Ashraf, O Sinanoglu… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Split manufacturing (SM) and layout camouflaging (LC) are two promising techniques to
obscure integrated circuits (ICs) from malicious entities during and after manufacturing …
obscure integrated circuits (ICs) from malicious entities during and after manufacturing …
Pseudo-3D approaches for commercial-grade RTL-to-GDS tool flow targeting monolithic 3D ICs
Despite the recent academic efforts to develop Electronic Design Automation (EDA)
algorithms for 3D ICs, the current market does not have commercial 3D computer-aided …
algorithms for 3D ICs, the current market does not have commercial 3D computer-aided …
Snap-3D: A constrained placement-driven physical design methodology for face-to-face-bonded 3D ICs
3D integration technology is one of the leading options that can advance Moore's Law
beyond conventional scaling. Due to the absence of commercial 3D placers and routers …
beyond conventional scaling. Due to the absence of commercial 3D placers and routers …