A 20 Mb/s phase modulator based on a 3.6 GHz digital PLL with− 36 dB EVM at 5 mW power
G Marzin, S Levantino, C Samori… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
This paper presents a low-power high-bit-rate phase modulator based on a digital PLL with
single-bit TDC and two-point injection scheme. At high bit rates, this scheme requires a …
single-bit TDC and two-point injection scheme. At high bit rates, this scheme requires a …
Wide tunning range 60 GHz VCO and 40 GHz DCO using single variable inductor
TY Lu, CY Yu, WZ Chen, CY Wu - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
This paper presents a 60 GHz, 16% tuning range VCO, and a 40 GHz, 18 bits, 14% tuning
range DCO incorporating variable inductor (VID) techniques. The variable inductor …
range DCO incorporating variable inductor (VID) techniques. The variable inductor …
An ultra low-power CMOS transceiver using various low-power techniques for LR-WPAN applications
YI Kwon, SG Park, TJ Park, KS Cho… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
In this work, we implemented and evaluated a fully integrated 2.4 GHz CMOS RF transceiver
using various low-power techniques for low-rate wireless personal area network (IEEE …
using various low-power techniques for low-rate wireless personal area network (IEEE …
State-of-the-art and future directions of high-performance all-digital frequency synthesis in nanometer CMOS
RB Staszewski - IEEE Transactions on Circuits and Systems I …, 2011 - ieeexplore.ieee.org
The past several years have successfully brought all-digital techniques to the RF frequency
synthesis, which could arguably be considered one of the last strong bastions of the …
synthesis, which could arguably be considered one of the last strong bastions of the …
Spur-free multirate all-digital PLL for mobile phones in 65 nm CMOS
RB Staszewski, K Waheed, F Dulger… - IEEE Journal of Solid …, 2011 - ieeexplore.ieee.org
We propose a new multirate architecture of an all-digital PLL (ADPLL) featuring
phase/frequency modulation capability. While the ADPLL approach has already proven its …
phase/frequency modulation capability. While the ADPLL approach has already proven its …
Circuits and system design of RF polar transmitters using envelope-tracking and SiGe power amplifiers for mobile WiMAX
This paper discusses the circuits and system design methodology of a highly-efficient
wideband RF polar transmitter (TX) using the envelope-tracking (ET) technique for mobile …
wideband RF polar transmitter (TX) using the envelope-tracking (ET) technique for mobile …
Highly efficient RF transmitter over broad average power range using multilevel envelope-tracking power amplifier
We present a highly efficient RF transmitter over broad average power range using a
multilevel envelope-tracking power amplifier (ML-ET PA). The ML-ET PA delivers enhanced …
multilevel envelope-tracking power amplifier (ML-ET PA). The ML-ET PA delivers enhanced …
A novel digital-intensive hybrid polar-I/Q RF transmitter architecture
T Buckel, P Preyler, A Klinkan… - … on Circuits and …, 2018 - ieeexplore.ieee.org
A novel digital-intensive hybrid transmitter (TX) architecture is presented, combining
conventional inphase and quadrature (I/Q) with constrained phase modulation. The …
conventional inphase and quadrature (I/Q) with constrained phase modulation. The …
A low-power GSM/EDGE/WCDMA polar transmitter in 65-nm CMOS
M Youssef, A Zolfaghari, B Mohammadi… - IEEE Journal of Solid …, 2011 - ieeexplore.ieee.org
A low-power, multimode polar transmitter based on a two-point injection PLL with a
linearized VCO is implemented in 65-nm CMOS technology. A wideband feedback loop …
linearized VCO is implemented in 65-nm CMOS technology. A wideband feedback loop …
Digital interpolating phase modulator for wideband outphasing transmitters
J Lemberg, M Kosunen, E Roverato… - … on Circuits and …, 2016 - ieeexplore.ieee.org
Radio transmitters are evolving towards digital-intensive solutions to exploit reconfigurability
and benefit from CMOS process scaling. Outphasing has been identified as a suitable …
and benefit from CMOS process scaling. Outphasing has been identified as a suitable …