A 44fs RMS jitter 6GHz limiting amplifier in 22nm CMOS FDSOI

Advanced Mixed Signal Concepts Exploiting the Strong Body-Bias Effect in CMOS 22FDX®

E Wittenhagen, M Runge, N Lotfi… - … on Circuits and …, 2020 - ieeexplore.ieee.org
In this article, an overview of the most recent fully-depleted silicon on insulator technology
(FD-SOI) design techniques in the field of mixed-signal circuits and systems are given …
被引用次数：23 相关文章 所有 2 个版本

A 3 GS/s> 55 dBFS SNDR Time-Interleaved RF Track and Hold Amplifier with> 67 dBc SFDR up to 3 GHz in 22FDX

E Wittenhagen, P Artz, P Scholz… - 2021 IEEE Radio …, 2021 - ieeexplore.ieee.org
In this paper a high-linear 3GS/s 2x TI RF TaH circuit driven by a single wideband bulk-
controlled input buffer is presented. The measured output buffered TaH reveals an SFDR …
被引用次数：13 相关文章

Body-bias techniques in CMOS 22fdx® for mixed-signal circuits and systems

F Gerfers, N Lotfi, E Wittenhagen… - 2019 26th IEEE …, 2019 - ieeexplore.ieee.org
22FDX®, a 22nm CMOS fully-depleted silicon on insulator technology (FD-SOI), provides
both, a unique wideband body-bias tuning range, as well as reduced junction capacitances …
被引用次数：14 相关文章
[PDF] ieee.org

A 3-GS/s RF Track-and-Hold Amplifier Utilizing Body-Biasing With> 55-dBFS SNR and> 67-dBc SFDR Up to 3 GHz in 22-nm CMOS SOI

E Wittenhagen, PJ Artz, P Scholz… - IEEE Open Journal of …, 2022 - ieeexplore.ieee.org
In this article, a 3-GS/s time-interleaved (TI) RF track-and-hold (TaH) amplifier designed in a
22-nm SOI technology is presented. The TaH amplifier is designed to drive an ADC, which …
被引用次数：3 相关文章

PAM-4/6/8 Performance and Power Analysis for Next Generation 224Gbit/s Links

U Hecht, E Wittenhagen, H Cirit… - … on Circuits and …, 2022 - ieeexplore.ieee.org
Next-generation data centers demand higher bandwidth, generating interest in 224 Gbit/s
wireline transceivers. This paper analyzes the performance of PAM-4/PAM-6/PAM-8 for a co …
被引用次数：4 相关文章

An UWB 18.5 GS/s Sampling Front-End for a 74 GS/s 5-bit ADC in 22nm FDSOI

N Lotfi, F Gerfers - 2019 17th IEEE International New Circuits …, 2019 - ieeexplore.ieee.org
This paper presents the design of an ultra-wideband buffered front-end sampler (T&H)
operating at 18.5 GS/s. The linear sampler, intended for a 5-bit 4x time-interleaved (TI) flash …
被引用次数：8 相关文章 所有 2 个版本
[PDF] patrickkurth.de

A 56 GHz 19 fs RMS-jitter sub-sampling phase-locked loop for 112 Gbit/s transceivers

P Kurth, K Misselwitz, U Hecht… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
This paper presents a 56 GHz Sub-Sampling Phase-Locked Loop (SSPLL) for an optical
transceiver system. It employs an LC oscillator without frequency multiplier featuring a novel …
被引用次数：1 相关文章 所有 5 个版本

A Sub-Sampling Beam-Forming Summation Track and Hold for Software Defined Radio

E Wittenhagen, M Runge, W Keusgen… - … Symposium on Circuits …, 2020 - ieeexplore.ieee.org
In this paper a novel sampler that performs beam-forming is introduced. Several parts of the
receiver chain are combined into one compact sub-sampling beam-forming summation track …
被引用次数：2 相关文章 所有 3 个版本

A 9-bit, 45mW, 0.05 mm2 source-series-terminated DAC driver with echo canceller in 22nm CMOS for in-vehicle communication

H Ghafarian Mabhout - 2022 - depositonce.tu-berlin.de
The increasing amount of data transferring within a vehicle is driven by the expanding
applications implemented on it, initiated the use of Ethernet as a new standard within the …
相关文章 所有 2 个版本

[图书][B] A 9-Bit, 45mW, 0.05 mm2Source-Series-Terminated dac Driver with Echo Canceller in 22nm Cmos for In-Vehicle Communication

HG Mabhout - 2022 - search.proquest.com
The increasing amount of data transferring within a vehicle is driven by the expanding
applications implemented on it, initiated the use of Ethernet as a new standard within the …
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