Electronic system-level synthesis methodologies

A Gerstlauer, C Haubelt, AD Pimentel… - … on Computer-Aided …, 2009 - ieeexplore.ieee.org
With ever-increasing system complexities, all major semiconductor roadmaps have
identified the need for moving to higher levels of abstraction in order to increase productivity …

[PDF][PDF] Polyhedral extraction tool

S Verdoolaege, T Grosser - … International Workshop on …, 2012 - acohen.gitlabpages.inria.fr
We present a new library for extracting a polyhedral model from C source. The library is
based on clang, the LLVM C frontend, and isl, a library for manipulating quasi-affine sets …

MAPS: Mapping concurrent dataflow applications to heterogeneous MPSoCs

J Castrillon, R Leupers… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Processor Systems on Chip (MPSoCs) in order to cope with the increasing applications
demands and the tight energy budget of portable devices. The complexity of these systems …

Daedalus: toward composable multimedia MP-SoC design

H Nikolov, M Thompson, T Stefanov… - Proceedings of the 45th …, 2008 - dl.acm.org
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-
SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which …

A fully pipelined and dynamically composable architecture of CGRA

J Cong, H Huang, C Ma, B Xiao… - 2014 IEEE 22nd Annual …, 2014 - ieeexplore.ieee.org
Future processor chips will not be limited by the transistor resources, but will be mainly
constrained by energy efficiency. Reconfigurable fabrics bring higher energy efficiency than …

Memory partitioning for multidimensional arrays in high-level synthesis

Y Wang, P Li, P Zhang, C Zhang, J Cong - Proceedings of the 50th …, 2013 - dl.acm.org
Memory partitioning is widely adopted to efficiently increase the memory bandwidth by using
multiple memory banks and reducing data access conflict. Previous methods for memory …

Systematic and automated multiprocessor system design, programming, and implementation

H Nikolov, T Stefanov… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
For modern embedded systems in the realm of high-throughput multimedia, imaging, and
signal processing, the complexity of embedded applications has reached a point where the …

A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs

M Thompson, H Nikolov, T Stefanov… - Proceedings of the 5th …, 2007 - dl.acm.org
In this paper, we present the Daedalus framework, which allows for traversing the path from
sequential application specification to a working MP-SoC prototype in FPGA technology with …

An optimal microarchitecture for stencil computation acceleration based on non-uniform partitioning of data reuse buffers

J Cong, P Li, B Xiao, P Zhang - Proceedings of the 51st annual design …, 2014 - dl.acm.org
High-level synthesis (HLS) tools have made significant progress in compiling high-level
descriptions of computation into highly pipelined register-transfer level (RTL) specifications …

Composability and predictability for independent application development, verification, and execution

B Akesson, A Molnos, A Hansson, JA Angelo… - … System-on-Chip …, 2011 - Springer
Abstract System-on-chip (soc) design gets increasingly complex, as a growing number of
applications are integrated in modern systems. Some of these applications have real-time …