[PDF][PDF] Analysis of safeness in a Petri net-based specification of the control part of cyber-physical systems
M Wojnakowski, R Wiśniewski… - … Journal of Applied …, 2021 - intapi.sciendo.com
The paper proposes an algorithm for safeness verification of a Petri net-based specification
of the control part of cyberphysical systems. The method involves a linear algebra technique …
of the control part of cyberphysical systems. The method involves a linear algebra technique …
Design and verification of real-life processes with application of Petri nets
I Grobelna, R Wiśniewski, M Grobelny… - … on Systems, Man …, 2016 - ieeexplore.ieee.org
This paper focuses on the design and verification methods of distributed logic controllers
supervising real-life processes. Such systems have to be designed very carefully and …
supervising real-life processes. Such systems have to be designed very carefully and …
Design of Petri net-based cyber-physical systems oriented on the implementation in field programmable gate arrays
R Wisniewski - Energies, 2021 - mdpi.com
Two design flows of the Petri net-based cyber-physical systems oriented towards
implementation in an FPGA are presented in the paper. The first method is based on the …
implementation in an FPGA are presented in the paper. The first method is based on the …
Prototyping of concurrent control systems with application of Petri nets and comparability graphs
This paper shows a novel prototyping technique for concurrent control systems described by
interpreted Petri nets. The technique is based on the decomposition of an interpreted Petri …
interpreted Petri nets. The technique is based on the decomposition of an interpreted Petri …
C-exact hypergraphs in concurrency and sequentiality analyses of cyber-physical systems specified by safe Petri nets
R Wiśniewski, M Wiśniewska, M Jarnut - IEEE Access, 2019 - ieeexplore.ieee.org
The paper proposes the novel concurrency and sequentiality analysis techniques of a cyber-
physical system specified by a safe Petri net. The presented methods are based on the …
physical system specified by a safe Petri net. The presented methods are based on the …
Model checking of UML activity diagrams in logic controllers design
I Grobelna, M Grobelny, M Adamski - … -RELCOMEX. June 30–July 4, 2014 …, 2014 - Springer
The article presents a novel approach to model checking of UML activity diagrams (in
version 2. x) for logic controller specification. A novel idea to design embedded systems by …
version 2. x) for logic controller specification. A novel idea to design embedded systems by …
Application of comparability graphs in decomposition of Petri nets
R Wiśniewski, A Karatkevich… - 2014 7th International …, 2014 - ieeexplore.ieee.org
In the article we present a new algorithm of Petri net decomposition into State Machine
Components (SMCs). The idea bases on the application of the comparability graph theory …
Components (SMCs). The idea bases on the application of the comparability graph theory …
Translation UML diagrams into Verilog
The paper presents a method of using the UML state machine diagrams for specification of
programs of logic controllers. The proposed method allows transformation from UML state …
programs of logic controllers. The proposed method allows transformation from UML state …
Reachability tree in liveness analysis of Petri net-based cyber-physical systems
M Popławski, M Wojnakowski, G Bazydło… - AIP Conference …, 2022 - pubs.aip.org
Liveness is one of the crucial properties in the analysis of the Petri net-based cyber-physical
systems. The paper proposes two algorithms related to the analysis of the liveness. The first …
systems. The paper proposes two algorithms related to the analysis of the liveness. The first …
UML state machine implementation in FPGA devices by means of dual model and Verilog
M Doligalski, M Adamski - 2013 11th IEEE international …, 2013 - ieeexplore.ieee.org
The paper presents the methodology of the logic controller development process based on
the UML state machine diagram. The development process covers the logic synthesis and …
the UML state machine diagram. The development process covers the logic synthesis and …