An architecture-independent cgra compiler enabling openmp applications

T Kojima, B Adhi, C Cortes, Y Tan… - 2022 IEEE international …, 2022 - ieeexplore.ieee.org
Coarse-Grained reconfigurable architecture (CGRA) is a promising platform for HPC
systems in the post-Moore's era. A single-source programming model is essential for …

Dynamical self-reconfigurable mechanism for data-driven cell array

R Shan, L Jiang, H Wu, F He, X Liu - Journal of Shanghai Jiaotong …, 2021 - Springer
The utilization of computation resources and reconfiguration time has a large impact on
reconfiguration system performance. In order to promote the performance, a dynamical self …

A Pipeline Pattern Detection Technique in Polly

D Talaashrafi, J Doerfert, M Moreno Maza - Workshop Proceedings of the …, 2022 - dl.acm.org
The polyhedral model has repeatedly shown how it facilitates various loop transformations,
including loop parallelization, loop tiling, and software pipelining. However, parallelism is …

[PDF][PDF] 基于存储划分和路径重用的粗粒度可重构结构循环映射算法

张兴明, 袁开坚, 高彦钊 - 电子与信息学报, 2018 - jeit.ac.cn
目前针对粗粒度可重构结构循环映射的研究主要集中在操作布局和临时数据路由,
缺乏考虑数据映射的研究, 该文提出一种基于存储划分和路径重用的模调度映射流程 …

[PDF][PDF] Mentai: A fully automated cgra application development environment that supports hardware/software co-design

A Ohwada, T Kojima, H Amano - Proceedings of SASIMI 2021, 2021 - sasimi.jp
Energy-efficient coarse-grained reconfigurable architectures (CGRAs) have been attracting
attention as accelerators for IoT devices. CGRAs have several processing units called PEs …

Advances in the Automatic Detection of Optimization Opportunities in Computer Programs

D Talaashrafi - 2022 - search.proquest.com
Massively parallel and heterogeneous systems together with their APIs have been used for
various applications. To achieve high-performance software, the programmer should …

[PDF][PDF] Optimised Synthesis of OpenGL Shader Language into Dynamically Reconfigurable Hardware for Heterogeneous Graphics Acceleration

AE Beasley, RJ Watson, CT Clarke - researchgate.net
The paper presents a synthesis tool that takes OpenGL shader language and produces the
equivalent hardware for use on an FPGA. The hardware produced is optimised to remove …

Coarse Grained Reconfigurable Architecture Loop Mapping Algorithm Based on Memory Partitioning and Path Reuse

X ZHANG, K YUAN, Y GAO - 电子与信息学报, 2018 - jeit.ac.cn
The current research on Coarse Grained Reconfigurable Architecture (CGRA) loop mapping
mainly focuses on operation placement and data routing, but seldom involves data mapping …

On higher order computations, rewiring the connectome, and non-von Neumann computer architecture

S Ambroszkiewicz - arXiv preprint arXiv:1603.02238, 2016 - arxiv.org
Structural plasticity in the brain (ie rewiring the connectome) may be viewed as mechanisms
for dynamic reconfiguration of neural circuits. First order computations in the brain are done …

[引用][C] C Compiler for the VERSAT Reconfigurable Processor

GCR dos Santos - 2019