Impact of process variations on multicore performance symmetry
E Humenay, D Tarjan, K Skadron - 2007 Design, Automation & …, 2007 - ieeexplore.ieee.org
Multi-core architectures introduce a new granularity at which process variations may occur,
yielding asymmetry among cores that were designed-and that software expects to be …
yielding asymmetry among cores that were designed-and that software expects to be …
Design of sequential elements for low power clocking system
Power consumption is a major bottleneck of system performance and is listed as one of the
top three challenges in International Technology Roadmap for Semiconductor 2008. In …
top three challenges in International Technology Roadmap for Semiconductor 2008. In …
Low-power clock branch sharing double-edge triggered flip-flop
In this paper, a new technique for implementing low-energy double-edge triggered flip-flops
is introduced. The new technique employs a clock branch-sharing scheme to reduce the …
is introduced. The new technique employs a clock branch-sharing scheme to reduce the …
[图书][B] Analysis and design of resilient VLSI circuits: mitigating soft errors and process variations
R Garg - 2009 - books.google.com
This monograph is motivated by the challenges faced in designing reliable VLSI systems in
modern VLSI processes. The reliable operation of integrated circuits (ICs) has become …
modern VLSI processes. The reliable operation of integrated circuits (ICs) has become …
Low-power clocked-pseudo-NMOS flip-flop for level conversion in dual supply systems
P Zhao, JB McNeely, PK Golconda… - … Transactions on Very …, 2009 - ieeexplore.ieee.org
Clustered voltage scaling (CVS) is an effective way to decrease power dissipation. One of
the design challenges is the design of an efficient level converter with fewer power and …
the design challenges is the design of an efficient level converter with fewer power and …
Using dependence analysis to support the software maintenance process
JP Loyall, SA Mathisen - 1993 Conference on Software …, 1993 - ieeexplore.ieee.org
Dependence analysis is useful for software maintenance because it indicates the possible
effects of a software modification on the rest of a program. This helps the software maintainer …
effects of a software modification on the rest of a program. This helps the software maintainer …
NBTI and process variations compensation circuits using adaptive body bias
Reliability and variability have become big design challenges facing submicrometer high-
speed applications and microprocessors designers. A low area overhead adaptive body …
speed applications and microprocessors designers. A low area overhead adaptive body …
A novel adaptive design methodology for minimum leakage power considering PVT variations on nanoscale VLSI systems
KK Kim, YB Kim - IEEE transactions on very large scale …, 2009 - ieeexplore.ieee.org
This paper proposes a novel design method to minimize the leakage power during standby
mode using a novel adaptive supply voltage and body-bias voltage generating technique for …
mode using a novel adaptive supply voltage and body-bias voltage generating technique for …
A statistical design-oriented delay variation model accounting for within-die variations
MH Abu-Rahma, M Anis - IEEE Transactions on Computer …, 2008 - ieeexplore.ieee.org
The increase of statistical variations in advanced nanometer CMOS technologies poses a
major challenge for digital circuit design. In this paper, we study the impact of random …
major challenge for digital circuit design. In this paper, we study the impact of random …
Process-invariant current source design: Methodology and examples
AM Pappu, X Zhang, AV Harrison… - IEEE Journal of Solid …, 2007 - ieeexplore.ieee.org
In this paper, we present a design methodology and resulting circuits that compensate for
process variations without the need for post-fabrication efforts. We demonstrate how, using …
process variations without the need for post-fabrication efforts. We demonstrate how, using …